Patents by Inventor Jesus Palomino Echartea

Jesus Palomino Echartea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6965952
    Abstract: A bus framer includes an engine which extracts information from a frame of data being transmitted over a time-division multiplexed bus and a processor which retrieves the information from the engine over an internal bus and forwards the information. The bus framer further includes a mapper which maps the frame of data on the time-division multiplexed bus to a read/write bus and a functional module which receives the data from the read/write bus.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: November 15, 2005
    Assignee: Intel Corporation
    Inventors: Jesus Palomino Echartea, Gabriel Moreno
  • Patent number: 6748506
    Abstract: A memory stores data for transfer over a bus by a computer program that operates according to a bus frame protocol. The memory includes a data structure stored in the memory. The data structure includes a matrix having blocks arranged in N rows and M columns, where N and M are integers that are greater than one. A block of the matrix includes data used with the bus frame protocol and corresponds to a destination port and a time slot for the data.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: June 8, 2004
    Assignee: Intel Corporation
    Inventors: Jesus Palomino Echartea, Guillermo Lopez Lopez, Shiro Suzuki
  • Publication number: 20030084224
    Abstract: A bus framer includes an engine which extracts information from a frame of data being transmitted over a time-division multiplexed bus and a processor which retrieves the information from the engine over an internal bus and forwards the information. The bus framer further includes a mapper which maps the frame of data on the time-division multiplexed bus to a read/write bus and a functional module which receives the data from the read/write bus.
    Type: Application
    Filed: October 25, 2001
    Publication date: May 1, 2003
    Inventors: Jesus Palomino Echartea, Gabriel Moreno
  • Publication number: 20030074503
    Abstract: A memory stores data for transfer over a bus by a computer program that operates according to a bus frame protocol. The memory includes a data structure stored in the memory. The data structure includes a matrix having blocks arranged in N rows and M columns, where N and M are integers that are greater than one. A block of the matrix includes data used with the bus frame protocol and corresponds to a destination port and a time slot for the data.
    Type: Application
    Filed: October 15, 2001
    Publication date: April 17, 2003
    Inventors: Jesus Palomino Echartea, Guillermo Lopez Lopez, Shiro Suzuki
  • Publication number: 20030072328
    Abstract: A method includes receiving data from a series of network ports, transmitting the data to a first stage of a frame state machine, and determining if the data includes a key sequence. The method also includes moving the data from the first stage of the frame state machine to a second stage of the frame state machine if the data has the key sequence.
    Type: Application
    Filed: October 15, 2001
    Publication date: April 17, 2003
    Inventors: Jesus Palomino Echartea, Rogelio C. Gonzalez