Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a substrate having a trench and a gate structure in the trench. The gate structure includes a lower gate electrode, an upper gate electrode disposed over the lower gate electrode, and a silicide layer contacting the upper gate electrode.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a substrate having a trench and a gate structure in the trench. The gate structure includes a lower gate electrode, an upper gate electrode disposed over the lower gate electrode, and a silicide layer contacting the upper gate electrode.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a substrate having a surface. The surface has a first portion and a second portion protruding from the first portion. The semiconductor device also includes a dielectric layer disposed on the second portion and a gate conductive layer disposed on the dielectric layer.

Abstract: A memory structure is described, which includes a substrate, a word line structure, a bit line contact, and a bit line. The substrate has a trench. The word line structure is disposed in the trench of the substrate. The word line structure includes a word line, a gate dielectric layer, and a capping layer. The word line is disposed in the trench. The gate dielectric layer is disposed between the word line and the substrate. The capping layer covers the word line. The capping layer includes a first material film, and a dielectric constant of the first material layer is smaller than a dielectric constant of silicon nitride. The bit line contact is disposed on a portion of the trench and a portion of the capping layer. The bit line is disposed over the bit line contact and electrically connected to the bit line contact.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a substrate having a trench and a gate structure in the trench. The trench includes a lower gate electrode, an upper gate electrode over the lower gate electrode and a first dielectric layer partially disposed between the lower gate electrode and the upper gate electrode. The lower gate electrode and the upper gate electrode are spaced apart from the substrate by different distances, and the lower gate electrode and the upper gate electrode are configured to receive different voltages.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a substrate having a trench and a gate structure in the trench. The trench includes a lower gate electrode, an upper gate electrode over the lower gate electrode and a first dielectric layer partially disposed between the lower gate electrode and the upper gate electrode.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes forming a trench in a substrate and disposing a lower gate electrode in the trench.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate having a trench and a gate structure in the trench. The gate structure includes a lower gate electrode and an upper gate electrode over the lower gate electrode. The gate structure also includes a first barrier layer disposed between the lower gate electrode and the upper gate electrode. The gate structure also includes a first dielectric layer disposed between the lower gate electrode and the upper gate electrode. The first dielectric layer is adjacent to the first barrier layer.

Abstract: A semiconductor device with a passing gate is provided. The semiconductor device includes a substrate having a first trench and a first gate structure in the first trench. The first gate structure includes a first gate electrode having a first doped region.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes forming a first trench in a substrate, disposing a first gate electrode in the first trench, and disposing a dummy gate electrode on the first gate electrode in the first trench. The method also includes removing the dummy gate electrode from the first gate electrode and forming a first doped region in the first gate electrode.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a trench in a substrate; disposing an upper gate electrode in the trench; disposing a first dielectric layer on the upper gate electrode in the trench; and disposing a capping layer on the first dielectric layer in the trench.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate having a trench and a gate structure in the trench. The trench includes an upper gate electrode, a capping layer on the upper gate electrode and a first dielectric layer partially disposed between the upper gate electrode and the capping layer.

Abstract: A method includes forming a first conductive line and a second conductive respectively above a memory region and a peripheral region of a substrate. A capacitor is formed above the first conductive line. A bottom portion of a contact structure is formed above the second conductive line. A first dielectric layer is formed covering the capacitor and the bottom portion. First and second openings are formed in the first dielectric layer. The first opening is above the capacitor, and the second opening exposes the bottom portion. A middle portion of the contact structure and a gate material are respectively formed in the second opening and the first opening. A third opening is formed in the gate material to form a gate structure. A gate dielectric layer and a channel are formed in the third opening. A bit line is connected to the channel and the contact structure.

Abstract: The present application provides a memory device having a word line (WL) with dual conductive materials. The memory device includes a semiconductor substrate with an active area defined adjacent to a surface of the semiconductor substrate, wherein the semiconductor substrate includes a recess extending from the surface into the semiconductor substrate; and a word line disposed within the recess, wherein the word line includes a first insulating layer disposed within and conformal to the recess, a first conductive member surrounded by the first insulating layer and disposed within the recess, a second insulating layer disposed conformal to the first insulating layer and the first conductive member, and a second conductive member disposed adjacent to the first conductive member and surrounded by the second insulating layer.

Abstract: The present application provides a method for manufacturing a memory device having a word line (WL) with dual conductive materials. The method includes steps of providing a semiconductor substrate with an active area defined adjacent to a surface of the semiconductor substrate; forming a recess extending from the surface into the semiconductor substrate; disposing a first insulating layer conformal to the recess; disposing a first conductive material within the recess and surrounded by the first insulating layer; removing a portion of the first conductive material to form a first conductive member; disposing a second insulating layer within the recess and conformal to the first insulating layer and the first conductive member; and disposing a second conductive material within the recess and surrounded by the second insulating layer to form a second conductive member adjacent to the first conductive member.

Abstract: A memory includes a data storage device, a data processing device, and a contact element. The data processing device is disposed over the data storage device. The contact element is disposed between the data storage device and the data processing device. The contact element electrically connects the data storage device with the data processing device.

Abstract: A method of manufacturing a semiconductor memory is provided. The method includes steps of forming a data storage device; forming a data processing device over the data storage device; forming a contact element electrically connected to the data storage device; and forming a data processing device over the data storage device and electrically connected to the contact element.

Abstract: A semiconductor device includes a substrate, a dielectric layer, a source region, a drain region, and a metal structure. The substrate has a trench therein, and the dielectric layer is conformally formed over the substrate and the trench. The source region and the least one drain region are in the substrate. The metal structure is filled in the trench and surrounded by the dielectric layer, and the metal structure is disposed between the source region and the drain region. Moreover, the metal structure has a first metal portion and a second metal portion which has a height greater than a height of the first metal portion, and the first metal portion is disposed between the drain region and the second metal portion.

Abstract: A semiconductor structure is provided. The semiconductor substrate has an active region defined by an isolation structure. A trench passes through the active region and the isolation structure. The active region of the semiconductor substrate includes a fin structure in the trench. The fin structure includes a first protrusion extending upwards along a first sidewall of the trench.

Abstract: A method of manufacturing a semiconductor structure is provided. The method includes providing a semiconductor substrate having an active region, forming a fin structure in the active region, and forming a conductive element on the body portion and the first tapered portion of the fin structure. The fin structure includes a body portion, and a first tapered portion protruding from an upper surface of the body portion.