Abstract: A thin film transistor is disclosed, comprising a substrate, a polysilicon layer overlying the substrate, a gate insulating layer overlying the polysilicon layer, a gate electrode, a dielectric interlayer overlying the gate electrode and gate insulating layer, and a source/drain electrode overlying the dielectric interlayer. Specifically, the gate electrode comprises a first electrode layer overlying the gate insulating layer and a second electrode layer essentially overlying an upper surface of the first electrode layer. The first and second electrode layers each has substantially the same profile with a taper angle of less than about 90 degrees.

Abstract: A thin film transistor is disclosed, comprising a substrate, a polysilicon layer overlying the substrate, a gate insulating layer overlying the polysilicon layer, a gate electrode, a dielectric interlayer overlying the gate electrode and gate insulating layer, and a source/drain electrode overlying the dielectric interlayer. Specifically, the gate electrode comprises a first electrode layer overlying the gate insulating layer and a second electrode layer essentially overlying an upper surface of the first electrode layer. The first and second electrode layers each has substantially the same profile with a taper angle of less than about 90 degrees.