Patents by Inventor Jheng-Yi Jiang

Jheng-Yi Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11121235
    Abstract: A structure and a manufacturing method of a metal-oxide-semiconductor field-effect transistor with an element of IVA group ion implantation are disclosed. The element of IVA group ion implantation layer is disposed in a body and close to an interface between a gate oxide layer and the body. The element of IVA group ion implantation layer is utilized to change a property of a channel of the structure.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: September 14, 2021
    Assignee: National Tsing Hua University
    Inventors: Chih-Fang Huang, Jheng-Yi Jiang, Sheng-Hong Wang, Jia-Qing Hung
  • Publication number: 20200035810
    Abstract: A structure and a manufacturing method of a metal-oxide-semiconductor field-effect transistor with an element of IVA group ion implantation are disclosed. The element of IVA group ion implantation layer is disposed in a body and close to an interface between a gate oxide layer and the body. The element of IVA group ion implantation layer is utilized to change a property of a channel of the structure.
    Type: Application
    Filed: July 24, 2019
    Publication date: January 30, 2020
    Inventors: Chih-Fang HUANG, Jheng-Yi JIANG, Sheng-Hong WANG, Jia-Qing HUNG
  • Publication number: 20190355847
    Abstract: A structure of a trench metal-oxide-semiconductor field-effect transistor includes an N-current spread layer (N-CSL) disposed on the N-drift region a split gate structure formed in the gate trench and covered by the insulating layer; and a semiconductor protection layer disposed below the bottom of the trench and adjacent to the N-drift region, wherein the insulating layer is disposed above the semiconductor protection layer to protect the insulating layer from being broken through by an electric field when the structure turns off a bias; wherein the gate is separated from the split gate by the insulating layer to form a predetermined gap; and a depth position of a bottom of the trench gate is deeper than an interface between the P-well and the N-current spread layer.
    Type: Application
    Filed: July 30, 2019
    Publication date: November 21, 2019
    Inventors: Chih-Fang HUANG, Jheng-Yi JIANG
  • Patent number: 10468519
    Abstract: A structure of a trench metal-oxide-semiconductor field-effect transistor includes an N-current spread layer (N-CSL) disposed on the N-drift region a split gate structure formed in the gate trench and covered by the insulating layer; and a semiconductor protection layer disposed below the bottom of the trench and adjacent to the N-drift region, wherein the insulating layer is disposed above the semiconductor protection layer to protect the insulating layer from being broken through by an electric field when the structure turns off a bias; wherein the gate is separated from the split gate by the insulating layer to form a predetermined gap; and a depth position of a bottom of the trench gate is deeper than an interface between the P-well and the N-current spread layer.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: November 5, 2019
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Chih-Fang Huang, Jheng-Yi Jiang
  • Publication number: 20180315848
    Abstract: A structure of a trench metal-oxide-semiconductor field-effect transistor includes an N-current spread layer (N-CSL) disposed on the N-drift region a split gate structure formed in the gate trench and covered by the insulating layer; and a semiconductor protection layer disposed below the bottom of the trench and adjacent to the N-drift region, wherein the insulating layer is disposed above the semiconductor protection layer to protect the insulating layer from being broken through by an electric field when the structure turns off a bias; wherein the gate is separated from the split gate by the insulating layer to form a predetermined gap; and a depth position of a bottom of the trench gate is deeper than an interface between the P-well and the N-current spread layer.
    Type: Application
    Filed: April 24, 2018
    Publication date: November 1, 2018
    Inventors: Chih-Fang HUANG, Jheng-Yi JIANG
  • Patent number: 9412807
    Abstract: A semiconductor structure comprises a substrate, an epitaxial layer, an active area and a termination. The substrate has a first conducting type of semiconductor material. The epitaxial layer disposed on the substrate has a first conducting type of semiconductor material. The active area is a working area of the semiconductor structure. The termination protects the active area. The termination has a junction termination extension (JTE) having a second conducting type of semiconductor material. The counter-doped area is disposed in the JTE area and has the first conducting type of semiconductor material. A dose of the first conducting type of semiconductor material in the counter-doped area increases along one direction.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: August 9, 2016
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Chih-Fang Huang, Ting-Fu Chang, Hua-Chih Hsu, Jheng-Yi Jiang