Patents by Inventor Jhovel Louie Lopez

Jhovel Louie Lopez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Verification of programmable logic devices
    Patent number: 11443074
    Abstract: A data processing system comprises a management processor, a programmable logic device (PLD) coupled to the management processor, and a machine-readable medium (MRM). The MRM comprises a PLD configuration image to configure the PLD with image-defined logic that comprises self-verification logic and an image-defined management interface to enable the management processor to communicate with the self-verification logic. The MRM also comprises a cryptographic signature based on the PLD configuration image.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: September 13, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gennadiy Rozenberg, Naysen Robertson, Jhovel Louie Lopez
  • VERIFICATION OF PROGRAMMABLE LOGIC DEVICES
    Publication number: 20210319141
    Abstract: A data processing system comprises a management processor, a programmable logic device (PLD) coupled to the management processor, and a machine-readable medium (MRM). The MRM comprises a PLD configuration image to configure the PLD with image-defined logic that comprises self-verification logic and an image-defined management interface to enable the management processor to communicate with the self-verification logic. The MRM also comprises a cryptographic signature based on the PLD configuration image.
    Type: Application
    Filed: April 9, 2020
    Publication date: October 14, 2021
    Inventors: Gennadiy Rozenberg, Naysen Robertson, Jhovel Louie Lopez