Patents by Inventor Jhu-Ming Song

Jhu-Ming Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for forming interconnect structure
    Patent number: 11011419
    Abstract: An apparatus includes a plurality of interconnect structures over a substrate, a dielectric layer formed over a top metal line of the plurality of interconnect structures, a first barrier layer on a bottom and sidewalls of an opening in the dielectric layer, wherein the first barrier layer is formed of a first material and has a first thickness, a second barrier layer over the first barrier layer, wherein the second barrier layer is formed of a second material different from the first material and has a second thickness and a pad over the second barrier layer, wherein the pad is formed of a third material.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bor-Zen Tien, Jhu-Ming Song, Hsuan-Han Lin, Kuang-Hsin Chen, Mu-Yi Lin, Tzong-Sheng Chang
  • Method for Forming Interconnect Structure
    Publication number: 20200227316
    Abstract: An apparatus includes a plurality of interconnect structures over a substrate, a dielectric layer formed over a top metal line of the plurality of interconnect structures, a first barrier layer on a bottom and sidewalls of an opening in the dielectric layer, wherein the first barrier layer is formed of a first material and has a first thickness, a second barrier layer over the first barrier layer, wherein the second barrier layer is formed of a second material different from the first material and has a second thickness and a pad over the second barrier layer, wherein the pad is formed of a third material.
    Type: Application
    Filed: March 26, 2020
    Publication date: July 16, 2020
    Inventors: Bor-Zen Tien, Jhu-Ming Song, Hsuan-Han Lin, Kuang-Hsin Chen, Mu-Yi Lin, Tzong-Sheng Chang
  • Method for forming interconnect structure
    Patent number: 10629481
    Abstract: An apparatus includes a plurality of interconnect structures over a substrate, a dielectric layer formed over a top metal line of the plurality of interconnect structures, a first barrier layer on a bottom and sidewalls of an opening in the dielectric layer, wherein the first barrier layer is formed of a first material and has a first thickness, a second barrier layer over the first barrier layer, wherein the second barrier layer is formed of a second material different from the first material and has a second thickness and a pad over the second barrier layer, wherein the pad is formed of a third material.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: April 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bor-Zen Tien, Jhu-Ming Song, Hsuan-Han Lin, Kuang-Hsin Chen, Mu-Yi Lin, Tzong-Sheng Chang
  • Method for Forming Interconnect Structure
    Publication number: 20170323827
    Abstract: An apparatus includes a plurality of interconnect structures over a substrate, a dielectric layer formed over a top metal line of the plurality of interconnect structures, a first barrier layer on a bottom and sidewalls of an opening in the dielectric layer, wherein the first barrier layer is formed of a first material and has a first thickness, a second barrier layer over the first barrier layer, wherein the second barrier layer is formed of a second material different from the first material and has a second thickness and a pad over the second barrier layer, wherein the pad is formed of a third material.
    Type: Application
    Filed: July 24, 2017
    Publication date: November 9, 2017
    Inventors: Bor-Zen Tien, Jhu-Ming Song, Hsuan-Han Lin, Kuang-Hsin Chen, Mu-Yi Lin, Tzong-Sheng Chang
  • Method for forming interconnect structure
    Patent number: 9716034
    Abstract: A method comprises forming a plurality of interconnect components over a gate structure, wherein a bottom metal line of the interconnect components is connected to the gate structure through a gate plug, depositing a dielectric layer over a top metal line of the interconnect components, forming an opening in the dielectric layer, depositing a first barrier layer on a bottom and sidewalls of the opening using a non-plasma based deposition process, depositing a second barrier layer over the first barrier layer using a plasma based deposition process and forming a pad in the opening.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: July 25, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bor-Zen Tien, Jhu-Ming Song, Hsuan-Han Lin, Kuang-Hsin Chen, Mu-Yi Lin, Tzong-Sheng Chang
  • Method for Forming Interconnect Structure
    Publication number: 20160042992
    Abstract: A method comprises forming a plurality of interconnect components over a gate structure, wherein a bottom metal line of the interconnect components is connected to the gate structure through a gate plug, depositing a dielectric layer over a top metal line of the interconnect components, forming an opening in the dielectric layer, depositing a first barrier layer on a bottom and sidewalls of the opening using a non-plasma based deposition process, depositing a second barrier layer over the first barrier layer using a plasma based deposition process and forming a pad in the opening.
    Type: Application
    Filed: October 20, 2015
    Publication date: February 11, 2016
    Inventors: Bor-Zen Tien, Jhu-Ming Song, Hsuan-Han Lin, Kuang-Hsin Chen, Mu-Yi Lin, Tzong-Sheng Chang
  • Method for forming interconnect structure
    Patent number: 9190319
    Abstract: A method for forming interconnect structures comprises forming a metal line made of a first conductive material over a substrate, depositing a dielectric layer over the metal line, patterning the dielectric layer to form an opening, depositing a first barrier layer on a bottom and sidewalls of the opening using an atomic layer deposition technique, depositing a second barrier layer over the first barrier layer, wherein the first barrier layer is coupled to ground and forming a pad made of a second conductive material in the opening.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: November 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsuan-Han Lin, Jhu-Ming Song, Mu-Yi Lin, Kuang-Hsin Chen, Bor-Zen Tien, Tzong-Sheng Chang
  • Method For Forming Interconnect Structure
    Publication number: 20140252621
    Abstract: A method for forming interconnect structures comprises forming a metal line made of a first conductive material over a substrate, depositing a dielectric layer over the metal line, patterning the dielectric layer to form an opening, depositing a first barrier layer on a bottom and sidewalls of the opening using an atomic layer deposition technique, depositing a second barrier layer over the first barrier layer, wherein the first barrier layer is coupled to ground and forming a pad made of a second conductive material in the opening.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsuan-Han Lin, Jhu-Ming Song, Mu-Yi Lin, Kuang-Hsin Chen, Bor-Zen Tien, Tzong-Sheng Chang