Abstract: Disclosed are a method and a device for recovering clock data of a tributary signal in SDH, wherein the method includes that: it is to extract valid data of the signal from a time slot of each tributary in a synchronous digital hierarchy SDH frame, and store into a storage space corresponding to a time slot of each tributary in a cache; it is to recover a clock signal and a readout signal for the time slot of each tributary by means of time division multiplexing; when the readout signal for the time slot of any tributary is valid, it is to read out contents of the data from the storage space corresponding to the time slot of the tributary in the cache, and latch into a latch corresponding to the time slot; the device includes: a data extracting module, a clock recovery circuit and a data recovery module.

Abstract: Disclosed are a method and a device for recovering clock data of a tributary signal in SDH, wherein the method includes that: it is to extract valid data of the signal from a time slot of each tributary in a synchronous digital hierarchy SDH frame, and store into a storage space corresponding to a time slot of each tributary in a cache; it is to recover a clock signal and a readout signal for the time slot of each tributary by means of time division multiplexing; when the readout signal for the time slot of any tributary is valid, it is to read out contents of the data from the storage space corresponding to the time slot of the tributary in the cache, and latch into a latch corresponding to the time slot; the device includes: a data extracting module, a clock recovery circuit and a data recovery module.

Abstract: Disclosed is a method and apparatus for clock checking, to solve the problem of high resource occupation in existing clock checking methods. The method includes: a programmable device for performing frequency division on the source clock signal to obtain a reference clock signal; treating the source clock signal as a counting work clock to determine the counting value of rising edges and counting value of high levels of a clock signal being checked during each high level period out of N continuous high levels of the reference clock signal; and determining whether the clock signal being checked is valid according to the magnitude relationship between the counting value of the high levels of the clock signal being checked during each high level period and a first expected value, as well as the magnitude relationship between the counting value of the rising edges and a second expected value.

Abstract: Disclosed is a method and apparatus for clock checking, to solve the problem of high resource occupation in existing clock checking methods. The method includes: a programmable device for performing frequency division on the source clock signal to obtain a reference clock signal; treating the source clock signal as a counting work clock to determine the counting value of rising edges and counting value of high levels of a clock signal being checked during each high level period out of N continuous high levels of the reference clock signal; and determining whether the clock signal being checked is valid according to the magnitude relationship between the counting value of the high levels of the clock signal being checked during each high level period and a first expected value, as well as the magnitude relationship between the counting value of the rising edges and a second expected value.