Patents by Inventor Jicheng Chen

Jicheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124908
    Abstract: A method for preparing (S)-nicotine by reduction includes conducting a reduction process on an alkene compound as shown in Formula I and/or an iminium cation compound as shown in Formula II, thereby producing (S)-nicotine. The method is simple, safe, reliable, and yields both high purity and high quantities of (S)-nicotine production.
    Type: Application
    Filed: November 28, 2023
    Publication date: April 18, 2024
    Inventors: Wenqing LIN, Hongjie ZHENG, Xiaobo LIU, Zecong CHEN, Lingyu LI, Qingjun ZHOU, Songhe WANG, Yongtang YUE, Jicheng HU, Yue ZHANG, Shanshan MIAO
  • Publication number: 20240030412
    Abstract: The present disclosure relates to the technical field of batteries. Disclosed are a composite pole piece, a battery cell and a preparation method of the composite pole piece. The composite pole piece includes a supporting layer and an active composite layer. The supporting layer includes an insulating layer and a conductive layer arranged on a side of the insulating layer. The active composite layer is arranged on a side of the conductive layer far away from the insulating layer and includes an active layer and a metal foil layer. The active layer includes a plurality of active particles stacked on the conductive layer, and the metal foil layer is attached to the conductive layer and configured to fix the plurality of active particles on the conductive layer.
    Type: Application
    Filed: May 25, 2023
    Publication date: January 25, 2024
    Inventors: Hongjiang YU, Jicheng CHEN, Lei WEI, Rui WANG, Zhou XU
  • Publication number: 20240028738
    Abstract: Embodiments of the present application provide a trusted authentication system, method, mainboard, micro board, and a storage medium. According to the solution provided by the embodiments of the present application, when the system is powered on and starts, trusted authentication of a micro board itself is performed on the basis of a first trusted platform control module TPCM on the micro board and, after the authentication is passed, the other components in the micro board are controlled to leave a reset state and trusted authentication of the mainboard is performed by means of a mainboard authentication component used for performing trusted authentication of the mainboard.
    Type: Application
    Filed: September 9, 2021
    Publication date: January 25, 2024
    Applicant: ALIBABA GROUP HOLDING LIMITED
    Inventors: Hui Wang, Zhichao Li, Jicheng Chen, Zilong Huang, Tao Lyu, Fang Liu, Zhiqian Wang
  • Patent number: 9274961
    Abstract: A method for building a multi-processor system with nodes having multiple cache coherency domains. In this system, a directory built in a node controller needs to include processor domain attribute information, and the information can be acquired by configuring cache coherency domain attributes of ports of the node controller connected to processors. In the disclosure herein, the node controller can support the multiple physical cache coherency domains in a node.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: March 1, 2016
    Assignee: INSPUR ELECTRONIC INFORMATION INDUSTRY CO., LTD
    Inventors: Endong Wang, Leijun Hu, Jicheng Chen, Dong Zhang, Weifeng Gong, Feng Zhang
  • Publication number: 20150095008
    Abstract: An extension Cache Coherence protocol-based multi-level coherency domain simulation verification and test method. An extension Cache Coherence protocol-based multi-level coherency domain CC-NUMA (Cache Coherent Non-Uniform Memory Access) system protocol simulation model is built, a protocol table inquiring and state converting executing mechanism in a key node of a system ensures that a Cache Coherence protocol is maintained in a single computing domain and is simultaneously maintained among a plurality of computing domains, and accuracy and stability of intra-domain and inter-domain transmission are ensured; a credible protocol inlet conversion coverage rate evaluation driven verification method is provided, transactions are processed by loading an optimized transaction generator push model, a coverage rate index is obtained after the operation is ended, and the verification efficiency is increased in comparison with a random transaction promoting mechanism.
    Type: Application
    Filed: November 6, 2014
    Publication date: April 2, 2015
    Inventors: Endong WANG, Leijun HU, Jicheng CHEN, Feng ZHANG, Hengzhao ZHOU, Yunyue FU, Xiaowei GAN
  • Publication number: 20150067269
    Abstract: A method for building a multi-processor system with nodes having multiple cache coherency domains. In this system, a directory built in anode controller needs to include processor domain attribute information, and the information can be acquired by configuring cache coherency domain attributes of ports of the node controller connected to processors. In the disclosure herein, the node ca roller can support the multiple physical cache coherency domains in a node.
    Type: Application
    Filed: November 6, 2014
    Publication date: March 5, 2015
    Inventors: Endong WANG, Leijun HU, Jicheng CHEN, Dong ZHANG, Weifeng GONG, Feng ZHANG
  • Publication number: 20150058570
    Abstract: A method of constructing a Share-F state in a local domain of a multi-level cache coherency domain system, includes: 1) when it is requested to access S state remote data at the same address, determining an accessed data copy by inquiring a remote proxy directory RDIR, and determining whether the data copy is in an inter-node S state and an intra-node F state; 2) directly forwarding the data copy to a requester, and recording the data copy of the current requester as an inter-node Cache coherency domain S state and an intra-node Cache coherency domain F state; and 3) after data forwarding is completed, recording, in a remote data directory RDIR, an intra-node processor losing an F permission state as the inter-node Cache coherency domain S state and the intra-node Cache coherency domain F state.
    Type: Application
    Filed: November 6, 2014
    Publication date: February 26, 2015
    Inventors: Endong WANG, Jicheng CHEN, Leijun HU, Xiaowei GAN, Weifeng GONG
  • Publication number: 20070284239
    Abstract: All the traditional coke towers are lower skirt supporting structure, which makes the heat fatigue of the tower under high temperature inevitable. The weld crack on the lower skirt and the expansion and deformation at the lower part of the tower will occur within several years. The working efficiency and lifespan of the coke tower are severely restrained. Provided is a new design of coke tower which can greatly improve the performance of the coke tower under the existing technique condition. The skirt support is raised higher, the coke stuffing segment is suspended, and the bearing force mode is changed at the coke stuffing segment. Additionally, a jacket is added to the outer wall of the coke stuffing section of the tower. The new design significantly improves the efficiency of the coke tower, and the lifespan of the tower is greatly extended.
    Type: Application
    Filed: September 24, 2006
    Publication date: December 13, 2007
    Inventor: Jicheng Chen