Patents by Inventor Ji DAI

Ji DAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260187007
    Abstract: Systems and methods are disclosed for implementing a Non-Volatile Memory Express (NVMe) driver in a computer system. The method involves mapping a memory buffer into a user mode address space to facilitate data transfer with an NVMe device via direct memory access (DMA). Additionally, a first NVMe queue pair, including a submission queue (SQ) and a completion queue (CQ), is mapped into the user mode address space, allowing a user mode component to submit commands to the NVMe device. The method further enables the user mode component to ring a doorbell at the NVMe device. Finally, an NVMe command is processed in kernel mode using a second NVMe queue pair comprising a second SQ and a second CQ.
    Type: Application
    Filed: February 20, 2026
    Publication date: July 2, 2026
    Inventors: Ming JIN, Vadim MAKHERVAKS, Ji DAI, Tengda YAN, Yuan YI, Chuanjun YIN, Scott Chao-Chueh LEE
  • Patent number: 12658749
    Abstract: A flux-concentrating rotor structure is disclosed and includes an iron core and plural magnet components. The iron core is formed by stacking plural silicon steel sheets and includes plural magnet-receiving slots arranged along a circumferential direction. Each magnet-receiving slot has a T-shaped section. Each two adjacent magnet-receiving slots have a radial bridge, whereby each silicon steel sheet is integrally formed. The magnet components are arranged in the iron core, and correspondingly received within the magnet-receiving slots. Each magnet component includes two radial magnets and one tangential magnet. The two radial magnets are located on both sides of the tangential magnet along the circumferential direction and in contact with the tangential magnet. The two radial magnets are magnetized along the radial direction respectively and have opposite magnetizing directions. The tangential magnet is magnetized along the tangential direction.
    Type: Grant
    Filed: March 25, 2024
    Date of Patent: June 16, 2026
    Assignee: Delta Electronics, Inc.
    Inventors: Xiaoxiang Zhang, Hsin-Yi Huang, Ji Dai, Tzu-Ting Hsu
  • Patent number: 12591536
    Abstract: Systems and methods are disclosed for implementing a Non-Volatile Memory Express (NVMe) driver in a computer system. The method involves mapping a memory buffer into a user mode address space to facilitate data transfer with an NVMe device via direct memory access (DMA). Additionally, a first NVMe queue pair, including a submission queue (SQ) and a completion queue (CQ), is mapped into the user mode address space, allowing a user mode component to submit commands to the NVMe device. The method further enables the user mode component to ring a doorbell at the NVMe device. Finally, an NVMe command is processed in kernel mode using a second NVMe queue pair comprising a second SQ and a second CQ.
    Type: Grant
    Filed: February 29, 2024
    Date of Patent: March 31, 2026
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ming Jin, Vadim Makhervaks, Ji Dai, Tengda Yan, Yuan Yi, Chuanjun Yin, Scott Chao-Chueh Lee
  • Patent number: 12579088
    Abstract: A system and method for using a semi-polling model to monitor a Non-Volatile Memory Express (NVMe) completion queue (CQ). The method, implemented at an interrupt thread, includes receiving an input/output (I/O) request from an application and submitting a submission queue (SQ) entry into an NVMe SQ in response to the I/O request. The method further includes registering for notifications from a polling thread after submitting the SQ entry and receiving, from the polling thread, a notification of the presence of a CQ entry within an NVMe CQ. Additionally, the method involves removing the CQ entry from the NVMe CQ and notifying the application of completion of the I/O request.
    Type: Grant
    Filed: February 29, 2024
    Date of Patent: March 17, 2026
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ming Jin, Vadim Makhervaks, Ji Dai, Tengda Yan, Yuan Yi, Chuanjun Yin, Scott Chao-Chueh Lee
  • Patent number: 12547565
    Abstract: A system and method for using a semi-polling model to monitor a Non-Volatile Memory Express (NVMe) completion queue (CQ). The method, implemented at an interrupt thread, includes receiving an input/output (I/O) request from an application and submitting a submission queue (SQ) entry into an NVMe SQ in response to the I/O request. The method further includes registering for notifications from a polling thread after submitting the SQ entry and receiving, from the polling thread, a notification of the presence of a CQ entry within an NVMe CQ. Additionally, the method involves removing the CQ entry from the NVMe CQ and notifying the application of completion of the I/O request.
    Type: Grant
    Filed: February 29, 2024
    Date of Patent: February 10, 2026
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ming Jin, Vadim Makhervaks, Ji Dai, Tengda Yan, Yuan Yi, Chuanjun Yin, Scott Chao-Chueh Lee
  • Patent number: 12530370
    Abstract: The disclosed technology includes fault-tolerant data replication system implemented by a cluster of compute devices. The system includes a witness comprising persistent data storage and multiple nodes configured to selectively execute leader node operations when serving as a leader of the cluster. The leader node operations include detecting an availability status change for a follower node of the cluster and, in response, updating a subterm and a replication set. The subterm identifies a total number of availability status changes detected within the cluster over a given time interval, and the replication set identifies set of entities designated to provide acknowledgments counted when determining whether to commit a message following message replication. The leader node operations further include writing the replication set, the subterm, and other metadata to the witness in response to receiving a first client message from a client application following the availability status change.
    Type: Grant
    Filed: September 29, 2023
    Date of Patent: January 20, 2026
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ji Dai, Xin Zhang, Vadim Makhervaks
  • Publication number: 20250382588
    Abstract: The present invention provides for recombinant adeno-associated virus (rAAV) virions comprising a variant capsid polypeptide, wherein the variant capsid polypeptide comprises an alteration to an amino acid corresponding to an adeno-associated virus (AAV) capsid polypeptide amino acid selected from the list consisting of any one or more of V125, V183, N411, Y447, R490, T495, and F536 of SEQ ID NO: 1; and wherein the variant capsid polypeptide comprises an alteration to increase retrograde transport of the rAAV virion by an axon of a neuron. The present invention also provides for recombinant adeno-associated virus (rAAV) variant capsid polypeptides, wherein the variant capsid polypeptide comprises an alteration to an amino acid corresponding to an adeno-associated virus (AAV) capsid polypeptide amino acid selected from the list consisting of any one or more of V125, V183, N411, Y447, R490, T495, and F536 of SEQ ID NO: 1.
    Type: Application
    Filed: June 30, 2025
    Publication date: December 18, 2025
    Inventors: Zhonghua LU, Yefei CHEN, Ji DAI, Jianbang LIN, Taian LIU, Jianqing ZHANG, Xian GAO, Jonathan WILDE
  • Publication number: 20250382346
    Abstract: The present invention provides for heterologous genes of interest coupled to regulatory elements, wherein the regulatory elements comprise nucleotide sequences corresponding to a genomic sequence positioned 3? to a translational start site of an endogenous GPR88 gene.
    Type: Application
    Filed: June 30, 2025
    Publication date: December 18, 2025
    Inventors: Zhonghua LU, Yefei CHEN, Ji DAI, Jianbang LIN, Taian LIU, Jianqing ZHANG, Xian GAO, Jonathan WILDE
  • Publication number: 20250381307
    Abstract: The present invention provides for retro adeno-associated virus (retro-AAV) virions comprising a variant capsid polypeptide, wherein the variant capsid polypeptide comprises one or more alterations that promote retrograde transport of the retro-AAV by a neuron, and a nucleic acid comprising a heterologous gene of interest operatively coupled to a GPR88 and/or a R9P1 regulatory region.
    Type: Application
    Filed: June 30, 2025
    Publication date: December 18, 2025
    Inventors: Zhonghua LU, Yefei CHEN, Ji DAI, Jianbang LIN, Taian LIU, Jianqing ZHANG, Xian GAO, Jonathan WILDE
  • Publication number: 20250253727
    Abstract: A flux-concentrating rotor structure is disclosed and includes an iron core and plural magnet components. The iron core is formed by stacking plural silicon steel sheets and includes plural magnet-receiving slots arranged along a circumferential direction. Each magnet-receiving slot has a T-shaped section. Each two adjacent magnet-receiving slots have a radial bridge, whereby each silicon steel sheet is integrally formed. The magnet components are arranged in the iron core, and correspondingly received within the magnet-receiving slots. Each magnet component includes two radial magnets and one tangential magnet. The two radial magnets are located on both sides of the tangential magnet along the circumferential direction and in contact with the tangential magnet. The two radial magnets are magnetized along the radial direction respectively and have opposite magnetizing directions. The tangential magnet is magnetized along the tangential direction.
    Type: Application
    Filed: March 25, 2024
    Publication date: August 7, 2025
    Inventors: Xiaoxiang Zhang, Hsin-Yi Huang, Ji Dai, Tzu-Ting Hsu
  • Publication number: 20250156353
    Abstract: A system and method for using a semi-polling model to monitor a Non-Volatile Memory Express (NVMe) completion queue (CQ). The method, implemented at an interrupt thread, includes receiving an input/output (I/O) request from an application and submitting a submission queue (SQ) entry into an NVMe SQ in response to the I/O request. The method further includes registering for notifications from a polling thread after submitting the SQ entry and receiving, from the polling thread, a notification of the presence of a CQ entry within an NVMe CQ. Additionally, the method involves removing the CQ entry from the NVMe CQ and notifying the application of completion of the I/O request.
    Type: Application
    Filed: February 29, 2024
    Publication date: May 15, 2025
    Inventors: Ming JIN, Vadim MAKHERVAKS, Ji DAI, Tengda YAN, Yuan YI, Chuanjun YIN, Scott Chao-Chueh LEE
  • Publication number: 20250156360
    Abstract: Systems and methods are disclosed for implementing a Non-Volatile Memory Express (NVMe) driver in a computer system. The method involves mapping a memory buffer into a user mode address space to facilitate data transfer with an NVMe device via direct memory access (DMA). Additionally, a first NVMe queue pair, including a submission queue (SQ) and a completion queue (CQ), is mapped into the user mode address space, allowing a user mode component to submit commands to the NVMe device. The method further enables the user mode component to ring a doorbell at the NVMe device. Finally, an NVMe command is processed in kernel mode using a second NVMe queue pair comprising a second SQ and a second CQ.
    Type: Application
    Filed: February 29, 2024
    Publication date: May 15, 2025
    Inventors: Ming JIN, Vadim MAKHERVAKS, Ji DAI, Tengda YAN, Yuan YI, Chuanjun YIN, Scott Chao-Chueh LEE
  • Patent number: 12283851
    Abstract: A hairpin stator includes a core, slot-positions and hairpin wires. The core includes a first side and a second side. The slot-positions are configured on the core circumferentially to form M radially-adjacent slot-position layers, wherein M is an odd number greater than or equal to 5. The hairpin wires are configured in the slot-positions and connected to form a plurality of windings. The hairpin wires include a plurality of first U-shaped wires arranged at an outermost slot-position layer in the radial direction and a plurality of second U-shaped wires arranged at an innermost slot-position layer in the radial direction. Each first U-shaped wire includes a U-shaped section arranged at the outermost slot-position layer and protruding from the first side of the core. Each second U-shaped wire includes a U-shaped section arranged at the innermost slot-position layer and protruding from the second side of the core.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: April 22, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Wei Chuang, Yao-Hsien Shao, Ji Dai, Tzu-Ting Hsu, Yen-Wei Tseng
  • Publication number: 20250036651
    Abstract: The disclosed technology includes fault-tolerant data replication system implemented by a cluster of compute devices. The system includes a witness comprising persistent data storage and multiple nodes configured to selectively execute leader node operations when serving as a leader of the cluster. The leader node operations include detecting an availability status change for a follower node of the cluster and, in response, updating a subterm and a replication set. The subterm identifies a total number of availability status changes detected within the cluster over a given time interval, and the replication set identifies set of entities designated to provide acknowledgments counted when determining whether to commit a message following message replication. The leader node operations further include writing the replication set, the subterm, and other metadata to the witness in response to receiving a first client message from a client application following the availability status change.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 30, 2025
    Inventors: Ji DAI, Xin ZHANG, Vadim MAKHERVAKS
  • Patent number: 12191728
    Abstract: A hairpin stator includes an iron core, a plurality of slot-positions and a plurality of hairpin wires. The slot-positions are located in the circumferential direction of the iron core, and form a plurality of adjacent slot-position layers in the radial direction. The iron core includes polar regions, each polar region includes phases, and each phase includes phase slots. The hairpin wires are arranged in the slot-positions of the phase slots of the same phases of the polar regions, and the hairpin wires are connected to form windings. The hairpin wires include transpolar hairpin wires. A span of the transpolar hairpin wires on an insertion side of the iron core is equal to a quotient, which is obtained by dividing a total number of the phase slots by a total number of the polar regions, plus 1 or minus 1.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: January 7, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Wei Chuang, Yao-Hsien Shao, Ji Dai
  • Publication number: 20220344994
    Abstract: A hairpin stator includes an iron core, a plurality of slot-positions and a plurality of hairpin wires. The slot-positions are located in the circumferential direction of the iron core, and form a plurality of adjacent slot-position layers in the radial direction. The iron core includes polar regions, each polar region includes phases, and each phase includes phase slots. The hairpin wires are arranged in the slot-positions of the phase slots of the same phases of the polar regions, and the hairpin wires are connected to form windings. The hairpin wires include transpolar hairpin wires. A span of the transpolar hairpin wires on an insertion side of the iron core is equal to a quotient, which is obtained by dividing a total number of the phase slots by a total number of the polar regions, plus 1 or minus 1.
    Type: Application
    Filed: November 17, 2021
    Publication date: October 27, 2022
    Inventors: Yu-Wei CHUANG, Yao-Hsien SHAO, Ji DAI