Patents by Inventor Ji-Eun JOO

Ji-Eun JOO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240184318
    Abstract: An internal reference voltage generation device may include a cell array including a plurality of cells which provide reference voltages of different levels. Each of the plurality of cells may include one of a plurality of divider resistors included in a resistor string; a transmission gate configured to output a voltage of a divider node which is connected to the one divider resistor, in response to a select signal; and a unit decoder configured to provide the select signal to the transmission gate.
    Type: Application
    Filed: May 12, 2023
    Publication date: June 6, 2024
    Inventors: Jae Hyeong HONG, Jung Yeop LEE, Bon Kwang KOO, Heon Ki KIM, Young Seok NAM, Young Jo PARK, Keun Seon AHN, Soon Sung AN, Sung Hwa OK, Se Min LEE, Seung Yeop LEE, Nam Hea JANG, Jun Seo JANG, Ji Eun JOO
  • Patent number: 10998268
    Abstract: A semiconductor device includes an internal circuit and a power mesh configured to transmit an operating voltage to the internal circuit. The power mesh includes first power lines extending in a first direction and arranged in a second direction intersecting with the first direction, when viewed from a top; second power lines sharing lanes with the first power lines and at least partially overlapping with the first power lines in the second direction; first power straps extending in the second direction and coupled to the first power lines; and second power straps extending in the second direction and coupled to the second power lines. Each of the first and second power lines may have a width of the same size as a width of each lane in sections where they do not overlap, and may have a width of a size smaller than the width of each lane in sections where they overlap.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: May 4, 2021
    Assignee: SK hynix Inc.
    Inventors: Sung-Lae Oh, Kwang-Hwi Park, Tae-Sung Park, Chang-Man Son, Jung-Hoon Lee, Soo-Nam Jung, Ji-Eun Joo, Ji-Hyun Choi
  • Publication number: 20200227352
    Abstract: A semiconductor device includes an internal circuit and a power mesh configured to transmit an operating voltage to the internal circuit. The power mesh includes first power lines extending in a first direction and arranged in a second direction intersecting with the first direction, when viewed from a top; second power lines sharing lanes with the first power lines and at least partially overlapping with the first power lines in the second direction; first power straps extending in the second direction and coupled to the first power lines; and second power straps extending in the second direction and coupled to the second power lines. Each of the first and second power lines may have a width of the same size as a width of each lane in sections where they do not overlap, and may have a width of a size smaller than the width of each lane in sections where they overlap.
    Type: Application
    Filed: October 1, 2019
    Publication date: July 16, 2020
    Inventors: Sung-Lae OH, Kwang-Hwi PARK, Tae-Sung PARK, Chang-Man SON, Jung-Hoon LEE, Soo-Nam JUNG, Ji-Eun JOO, Ji-Hyun CHOI