Abstract: Provided is a semiconductor device including first, second and third source/drain regions. A first conductive plug in contact with the first source/drain regions, having a first width and a first height, and including a first material is provided. An interlayer insulating layer covering the first conductive plug and the substrate is disposed. A second conductive plug vertically penetrating the interlayer insulating layer to be in contact with the second source/drain regions, having a second width and a second height, and including a second material is provided. A third conductive plug vertically penetrating the interlayer insulating layer to be in contact with the third source/drain regions, having a third width and a third height, and including a third material is disposed. The second material includes a noble metal, a noble metal oxide or a perovskite-based conductive oxide.

Abstract: Provided is a semiconductor device including first, second and third source/drain regions. A first conductive plug in contact with the first source/drain regions, having a first width and a first height, and including a first material is provided. An interlayer insulating layer covering the first conductive plug and the substrate is disposed. A second conductive plug vertically penetrating the interlayer insulating layer to be in contact with the second source/drain regions, having a second width and a second height, and including a second material is provided. A third conductive plug vertically penetrating the interlayer insulating layer to be in contact with the third source/drain regions, having a third width and a third height, and including a third material is disposed. The second material includes a noble metal, a noble metal oxide or a perovskite-based conductive oxide.

Abstract: The present invention provides metal precursors for low temperature deposition. The metal precursors include a metal ring compound including at least one metal as one of a plurality of elements forming a ring. Methods of forming a metal thin layer and manufacturing a phase change memory device including use of the metal precursors is also provided.

Abstract: A phase change memory device includes a lower electrode provided on a substrate, an interlayer insulating layer including a contact hole exposing the lower electrode, and covering the substrate, a resistant material pattern filling the contact hole, a phase change pattern interposed between the resistant material pattern and the interlayer insulating layer, and extending between the resistant material pattern and the lower electrode, wherein the resistant material pattern has a higher resistance than the phase change pattern, and an upper electrode in contact with the phase change pattern, the upper electrode being electrically connected to the lower electrode through the phase change pattern.

Abstract: A method includes forming a phase change material layer on a substrate using a deposition process that employs a process gas. The process gas includes a germanium source gas, and the germanium source gas includes at least one of the atomic groups “—N?C?O”, “—N?C?S”, “—N?C?Se”, “—N?C?Te”, “—N?C?Po” and “—C?N”.

Abstract: A probe array may be fabricated by forming probes arranged on a sacrificial substrate, forming a probe substrate above the probes, and removing the sacrificial substrate. In one embodiment, first probes may be two-dimensionally formed in row and column directions on a sacrificial substrate. Second probes may be formed between the first probes arranged in the row direction such that a distance between the first and second probes is smaller than the resolution limit in a lithography process. A probe substrate may be formed on the sacrificial substrate having the first and second probes, and the sacrificial substrate may be removed.

Abstract: A phase change memory device includes a lower electrode provided on a substrate, an interlayer insulating layer including a contact hole exposing the lower electrode, and covering the substrate, a resistant material pattern filling the contact hole, a phase change pattern interposed between the resistant material pattern and the interlayer insulating layer, and extending between the resistant material pattern and the lower electrode, wherein the resistant material pattern has a higher resistance than the phase change pattern, and an upper electrode in contact with the phase change pattern, the upper electrode being electrically connected to the lower electrode through the phase change pattern.

Abstract: The present invention provides metal precursors for low temperature deposition. The metal precursors include a metal ring compound including at least one metal as one of a plurality of elements forming a ring. Methods of forming a metal thin layer and manufacturing a phase change memory device including use of the metal precursors is also provided.

Abstract: A phase-changeable layer and a method of forming the same are disclosed. In the method, a first hydrogen gas is introduced into a reaction chamber into which a substrate is loaded at a first flow rate to form first plasma. A primary cyclic CVD process is carried out using precursors in the reaction chamber to form a lower phase-changeable layer having a first grain size on the substrate. A second hydrogen gas is introduced into the reaction chamber at a second flow rate less than the first flow rate to form second plasma. A secondary cyclic CVD process is carried out using the precursors in the reaction chamber to form an upper phase-changeable layer having a second grain size smaller than the first grain size on the substrate, thereby forming a phase-changeable layer. Thus, the phase-changeable layer may have strong adhesion strength with respect to a lower layer and good electrical characteristics.

Abstract: In one embodiment, a phase change memory device includes an insulation structure over a substrate. The insulation structure ahs an opening defined therethrough. A first layer pattern is formed on sidewalls and a bottom of the opening. A second layer pattern is formed on the first layer pattern and substantially fills the opening.

Abstract: A method includes forming a phase change material layer on a substrate using a deposition process that employs a process gas. The process gas includes a germanium source gas, and the germanium source gas includes at least one of the atomic groups “—N?C?O”, “—N?C?S”, “—N?C?Se”, “—N?C?Te”, “—N?C?Po” and “—C?N”.

Abstract: A probe array may be fabricated by forming probes arranged on a sacrificial substrate, forming a probe substrate above the probes, and removing the sacrificial substrate. In one embodiment, first probes may be two-dimensionally formed in row and column directions on a sacrificial substrate. Second probes may be formed between the first probes arranged in the row direction such that a distance between the first and second probes is smaller than the resolution limit in a lithography process. A probe substrate may be formed on the sacrificial substrate having the first and second probes, and the sacrificial substrate may be removed.

Abstract: Disclosed are methods of forming ferroelectric material layers introducing a plurality of metallorganic source compounds into the reaction chamber, the source compounds being supplied in an appropriate ratio for forming the ferroelectric material. These metallorganic source compounds are, in turn, reacted with a NyOx/O2 oxidant gas mixture in which the NyOxcomponent(s) represents at least 50 volume percent of the oxidant gas. This mixture of metallorganic source compounds and oxidant gas mixture(s) are maintained at a deposition temperature and deposition pressure within the reaction chamber suitable for causing a reaction between the metallorganic source compounds and the oxidant gas for a deposition period sufficient to form the ferroelectric material layer. The resulting ferroelectric material layers exhibit improved uniformity, for example, near the interface with the bottom electrode.

Abstract: In a ferroelectric structure after a first lower electrode film is formed using a first metal nitride, a second lower electrode film is formed on the first lower electrode film using a first metal, a second metal oxide and/or a first alloy. After a ferroelectric layer is formed on the second lower electrode film, a first upper electrode film is formed on the ferroelectric layer using a second alloy. Related devices are also disclosed.

Abstract: A ferroelectric capacitor structure can include a ferroelectric layer on a lower electrode and an upper electrode on the ferroelectric layer, the upper electrode including a metal oxide and a metal.

Abstract: A deposition apparatus is provided that has a reaction-chamber, a wafer support, gas supply line, an ejection unit and a diffusion unit. The ejection unit includes a bottom portion spaced apart from a top wall of the reaction chamber to form a space. The diffusion unit is positioned below the gas supply line and includes a planar portion having upwardly extending flanges forming an upwardly open space below the gas supply line. Gas flowing from the gas supply line flows into the upwardly open space and ascends the upwardly extending flanges to diffuse the gas into the space.

Abstract: Showerheads for use in an apparatus for manufacturing a semiconductor substrate include an injection plate defining a bottom face of a gas receiving space in the showerhead and a gas receiving channel extending within the injection plate. A plurality of exhausting holes in the injection plate are coupled to the gas receiving channel. The exhausting holes are configured to exhaust gas from the gas receiving channel to the bottom face of the gas receiving space. A plurality of channels extend through the injection plate from the bottom face of the gas receiving space configured to flow gas from the bottom face of the gas receiving space out of the space.

Abstract: A deposition apparatus for depositing a predetermined material on a semiconductor substrate includes a chamber configured to perform a deposition process and a source gas supplier having a pulse fluid supplier configured to cyclically supply a source of a source gas to the chamber. The pulse fluid supplier includes a buffer configured to provide a space in which a fluid is received and a body including a first supply port connected to a source supplier, a second supply port connected to a carrier gas supply pipe, and a discharge port connected to a fluid supply pipe. The fluid supply pipe is configured such that fluid in the buffer flows through the fluid supply pipe to the chamber. The pulse fluid supplier includes a controller configured to selectively allow or prevent a source fluid supplied by the first supply port and a carrier gas supplied by the second supply port to flow to/from the buffer, and to allow or prevent a fluid in the buffer to flow to/from the fluid supply pipe.