Patents by Inventor Ji-Hae Kim

Ji-Hae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12055891
    Abstract: Provided is an operation method for a digital hologram implementation device including a backlight and a spatial light modulator, the operation method including setting an initial phase value of an optical signal to a remedy phase, computing a reduced phase based on the remedy phase, correcting the remedy phase based on a difference between the reduced phase and a preset optimized phase, determining whether the corrected remedy phase is a stabilized phase, performing forward propagation on the stabilized phase and an amplitude of the optical signal, correcting the amplitude of the optical signal, performing backward propagation on the corrected amplitude and the stabilized phase, and determining whether a phase derived by the backward propagation is an optimized phase.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: August 6, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Hae Kim, Gi Heon Kim, Joo Yeon Kim, Jong-Heon Yang, Sang Hoon Cheon, Seong-Mok Cho, Kyunghee Choi, Ji Hun Choi, Jae-Eun Pi, Chi-Sun Hwang
  • Publication number: 20230057939
    Abstract: The present disclosure relates to methods of treating a cancer (or a tumor) with an IL-7 protein in combination with a multispecific (e.g., bispecific) antibody.
    Type: Application
    Filed: January 12, 2021
    Publication date: February 23, 2023
    Applicant: NeoImmuneTech, Inc.
    Inventors: Seung-Woo LEE, Donghoon CHOI, Byung Ha LEE, Se Hwan YANG, Ji-Hae KIM, Sujeong PARK
  • Publication number: 20220008515
    Abstract: The present disclosure relates to methods of treating a cancer (or a tumor) with an IL-7 protein in combination with an immune checkpoint inhibitor, such as a PD-1 antagonist (e.g., anti-PD-1 antibody) or a CTLA-4 antagonist (e.g., anti-CTLA-4 antibody).
    Type: Application
    Filed: November 15, 2019
    Publication date: January 13, 2022
    Applicants: NeoImmuneTech, Inc., Genexine, Inc.
    Inventors: Seung-Woo LEE, Ji-Hae KIM, Saet-byeol JO, Han Wook PARK, Donghoon CHOI, Byung Ha LEE, Young Chul SUNG, Se Hwan YANG
  • Patent number: 10222826
    Abstract: A display device includes a cradle and a display module. The cradle includes a signal transmission unit configured to transmit an image signal, a housing exposing the signal transmission unit. The display module has a curved shape along a radius of a curvature and includes a signal reception unit configured to receive the image signal, an image display unit configured to display an image based on the image signal, and a second coupling member. The display device is configured to operate in any one of a first state and a second state, in which during the first state, the cradle and the display module are decoupled from each other, and in which during the second state, the first coupling member and the second coupling member are slide-coupled to each other, such that the display module moves along the circumference of a circle of the curvature of the display module.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: March 5, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: So-yeon Lee, Hyung-ku Kang, Gun-ho Kim, Ji-hae Kim, Hwajung Lee, Taewon Chung, Ggochip Choi
  • Publication number: 20170322589
    Abstract: A display device includes a cradle and a display module. The cradle includes a signal transmission unit configured to transmit an image signal, a housing exposing the signal transmission unit. The display module has a curved shape along a radius of a curvature and includes a signal reception unit configured to receive the image signal, an image display unit configured to display an image based on the image signal, and a second coupling member. The display device is configured to operate in any one of a first state and a second state, in which during the first state, the cradle and the display module are decoupled from each other, and in which during the second state, the first coupling member and the second coupling member are slide-coupled to each other, such that the display module moves along the circumference of a circle of the curvature of the display module.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 9, 2017
    Inventors: So-yeon LEE, Hyung-ku Kang, Gun-ho Kim, Ji-hae Kim, Hwajung Lee, Taewon Chung, Ggochip Choi
  • Patent number: 8184899
    Abstract: In a method of detecting a defect on an object, a preliminary reference image can be obtained from a plurality of comparison regions defined on the object. The preliminary reference image is divided into reference zones by a similar brightness. Each of the reference zones is provided with substantially the same gray level, respectively, to obtain a reference image. Whether a defect exists in an inspection region in the comparison regions is determined using the reference image. Thus, defects in the inspection regions having different brightnesses can be detected using the properly obtained reference image.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: May 22, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yu-Sin Yang, Kyung-Suk Song, Ji-Hae Kim, Chung-Sam Jun
  • Patent number: 7851864
    Abstract: A test structure includes a transistor, a dummy transistor and a pad unit. The transistor is formed on a first active region of a substrate. The dummy transistor is formed on a second active region of the substrate and electrically connected to the transistor. The pad unit is electrically connected to the transistor. Plasma damage to the transistor is reduced due to the presence of dummy transistor.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: December 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Se-Young Chung, Ji-Hae Kim
  • Publication number: 20090238445
    Abstract: In a method of detecting a defect on an object, a preliminary reference image can be obtained from a plurality of comparison regions defined on the object. The preliminary reference image is divided into reference zones by a similar brightness. Each of the reference zones is provided with substantially the same gray level, respectively, to obtain a reference image. Whether a defect exists in an inspection region in the comparison regions is determined using the reference image. Thus, defects in the inspection regions having different brightnesses can be detected using the properly obtained reference image.
    Type: Application
    Filed: March 19, 2009
    Publication date: September 24, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yu-Sin Yang, Kyung-Suk Song, Ji-Hae Kim, Chung-Sam Jun
  • Publication number: 20090020755
    Abstract: A test structure includes a transistor, a dummy transistor and a pad unit. The transistor is formed on a first active region of a substrate. The dummy transistor is formed on a second active region of the substrate and electrically connected to the transistor. The pad unit is electrically connected to the transistor. Plasma damage to the transistor is reduced due to the presence of dummy transistor.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 22, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se-Young CHUNG, Ji-Hae KIM
  • Publication number: 20060113590
    Abstract: An isolation layer having a first depth is formed from an upper face of a substrate. Source/drain regions including junctions are formed in the substrate. Each of the junctions has a second depth substantially smaller than the first depth. A first recess is formed in the substrate by a first etching process. A protection layer pattern is formed on a sidewall of the first recess. A second recess is formed beneath the first recess. The second recess has a width substantially larger than that of the first recess. The second recess is formed by a second etching process using an etching gas containing an SF6 gas, a Cl2 gas and an O2 gas. A gate insulation layer is formed on surfaces of the first and the second recesses. The second recess having an enlarged shape may reduce a width of the junction between the gate electrode and the isolation layer so that a leakage current generated through the junction may decrease.
    Type: Application
    Filed: November 22, 2005
    Publication date: June 1, 2006
    Inventors: Ji-Hae Kim, Ji-Young Kim, Jong-Chul Park, Yong-Sun Ko, Sang-Sup Jeong