Patents by Inventor Ji Hui Baek

Ji Hui Baek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230301091
    Abstract: There are provided a semiconductor device and a manufacturing method of the semiconductor device. The semiconductor device includes: a gate structure including conductive layers and insulating layers, which are alternately stacked; a plurality of channel structures penetrating the gate structure, the plurality of channel structures being arranged in a first direction; a plurality of cutting structures each isolating each of the plurality of channel structures, respectively, into a plurality of divided channel structures while penetrating each of the plurality of channel structures, respectively; and a plurality of interconnection lines located over the gate structure and extending in the first direction. Each of the plurality of cutting structures has substantially a cross (+) shape including extension parts extending in directions oblique to the first direction.
    Type: Application
    Filed: August 19, 2022
    Publication date: September 21, 2023
    Applicant: SK hynix Inc.
    Inventors: Sung Wook JUNG, Ji Hui BAEK, Jang Hee JUNG
  • Patent number: 9595331
    Abstract: A nonvolatile memory device may include a plurality of memory blocks each including a drain select line, word lines and a source select line, and a pass transistor stage including a plurality of pass transistors formed in series in an active region and suitable for transferring word line voltages to a memory block selected among the memory blocks, in response to a block select signal, wherein the pass transistors each share a drain with a first adjacent pass transistor at one side while sharing a source with a second adjacent pass transistor at the other, and wherein a pair of pass transistors which share the source transfer word line driving signal form drains thereof to a pair of word lines which are included in different memory blocks among the memory blocks, through the source.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: March 14, 2017
    Assignee: SK Hynix Inc.
    Inventors: Go-Hyun Lee, Jin Ho Kim, Ji Hui Baek, Sung Wook Jung
  • Patent number: 9530742
    Abstract: The present disclosure provides a semiconductor device with a structural stability. The semiconductor device includes a stack of vertical alterations of conductive layers and insulating layers; supports passing through the stack, each of the supports having a cross-section of an equilateral polygon, the supports being equidistantly arranged in a first direction and a second direction, the first and second directions crossing each other; and contact plugs electrically coupled respectively to the conductive layers, each of the contact plugs being disposed between at least two adjacent supports of the supports.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: December 27, 2016
    Assignee: SK Hynix Inc.
    Inventors: Sung Wook Jung, Kyung Bo Kim, Ji Hui Baek, Jang Hee Jung
  • Patent number: 9330766
    Abstract: A semiconductor device according to an embodiment may include cell strings including a plurality of memory cells coupled between bit lines and a source line and coupled to word lines, a peripheral circuit suitable for programming selected memory cells coupled to a selected word line among the word lines by applying a program voltage to the selected word line, and applying one or more pass voltages to unselected word lines, and a control circuit suitable for controlling the peripheral circuit to temporarily float the unselected word lines while the selected memory cells are programmed.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: May 3, 2016
    Assignee: SK Hynix Inc.
    Inventors: Sung Wook Jung, Hye Eun Heo, Ji Hui Baek, Dong Hun Lee, Tae Hwa Lee
  • Patent number: 9281217
    Abstract: A method of manufacturing a semiconductor memory device includes forming a first attached layer on a substrate, forming a stack layer on the first attached layer, separating the stack layer and the first attached layer from each other, forming vertical holes by performing a first etch process on the stack layer in a direction from bottom to top, removing the first attached layer, attaching the stack layer in which the vertical holes are formed to the substrate, and performing a second etch process so that each of the vertical holes has a uniform width.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: March 8, 2016
    Assignee: SK Hynix Inc.
    Inventors: Sung Wook Jung, Ji Hui Baek, Dong Hun Lee, Tae Hwa Lee, Hye Eun Heo