Patents by Inventor Ji Hun LIM

Ji Hun LIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250093114
    Abstract: The present invention relates to a composite heat exchanger for an electric vehicle. The objective of the present invention is to provide an integrated composite heat exchanger that allows a plurality of heat exchange media to be distributed in each area, and to provide a composite heat exchanger for an electric vehicle that obtains effects, by means of integration, such as reducing the number of components and the number of processes, improving refrigerant flow characteristics, and improving cooling efficiency, and in addition, the problem of concentration of thermal stress caused by the integration of the heat exchanger is resolved by means of improving the shape of the area boundary.
    Type: Application
    Filed: December 5, 2022
    Publication date: March 20, 2025
    Inventors: Sang Ouk LEE, Hyunkeun SHIN, Hong-Young LIM, Gwang Ok KO, Sung Hong SHIN, Jong Chan LEE, Ji Hun HAN
  • Patent number: 12230449
    Abstract: A multilayer electronic component includes a body including a dielectric layer and a first internal electrode and a second internal electrode having first to sixth surfaces, a first external electrode including a first connection portion on the third surface, a first band portion on a portion of the first surface, and a third band portion on a portion of the second surface, a second external electrode including a second connection portion on the fourth surface, a second band portion on a portion of the first surface, and a fourth band portion on a portion of the second surface, an insulating layer disposed on the first and second connection portions and covering the second surface and the third and fourth band portions, a first plating layer disposed on the first band portion, and a second plating layer disposed on the second band portion. The insulating layer includes an oxide containing Ba.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: February 18, 2025
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sung Soo Kim, Jae Young Na, Jin Hyung Lim, Seung Hun Han, Ji Hong Jo
  • Patent number: 12211474
    Abstract: A wheel for reducing a resonance noise in a vehicle may include a cylindrical-shaped rim on which a tire is mounted, and waveguides mounted on the rim, disposed in a cavity which is a space between the rim and the tire, having a ā€˜Uā€™-shaped internal passage through which a sound wave generated in the cavity enters, and configured to reflect the sound wave entering the internal passage to generate a sound wave having an inverse phase, wherein a center portion of the internal passage extends in an axial direction of the rim, and first and second end portions of the internal passage are connected to a center portion of the internal passage to allow the sound wave to propagate and extend in a circumferential direction of the rim.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: January 28, 2025
    Assignees: Hyundai Motor Company, Kia Corporation, Hyundai Sungwoo Casting Co., Ltd.
    Inventors: Young Jin We, Ji Hoon Jeong, Jong Ju Lee, Da Woon Lim, Seong Hun Choi, Sang Bum Park, Young Il Kim
  • Publication number: 20240014456
    Abstract: Disclosure relates to an electrochemical lithium recovery system, and the electrochemical lithium recovery system is characterized by having a first flow electrode module that selectively extracts lithium ions from an object solution containing a waste battery active material by electrical attraction, and a second flow electrode module recovering the lithium ions extracted by the first flow electrode module, by the electric repulsive force. Accordingly, the electrochemical lithium recovery system does not require a high temperature treatment process, does not require a large amount of chemicals, and can ensure high recovery efficiency.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 11, 2024
    Applicant: Korea University Research and Business Foundation
    Inventors: Seung-Kwan HONG, Ji-Hun LIM, Hyun-Cheal LEE
  • Publication number: 20230343801
    Abstract: An image sensor includes a substrate, a photoelectric conversion region in the substrate with the substrate defining a substrate trench on the photoelectric conversion region, a floating diffusion region adjacent to a side surface of the substrate trench, in the substrate, a gate dielectric film that extends along the side surface and a lower surface of the substrate trench and a transfer gate electrode which includes a lower gate that fills a portion of the substrate trench on the gate dielectric film and has a first width, and an upper gate that has a second width smaller than the first width on the lower gate. The gate dielectric film includes a lower dielectric film interposed between the substrate and the lower gate and has a first thickness, and an upper dielectric film adjacent to the floating diffusion region and has a second thickness greater than the first thickness.
    Type: Application
    Filed: February 8, 2023
    Publication date: October 26, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ju Hee LEE, Dong Mo IM, Ji Hee YANG, Tae-Hun LEE, Ji-Hun LIM
  • Publication number: 20230201773
    Abstract: A flow-electrode cartridge unit and a submerged flow-electrode capacitive deionization device using the same are proposed. The flow-electrode cartridge unit includes a pair of porous current collector plates arranged to face each other in a spaced apart state from each other in a first direction, a pair of ion separation membranes positioned on respective outer surfaces of the porous current collector plates in the first direction, a channel frame for wrapping around the pair of porous current collector plates and the pair of ion separation membranes to expose each of the ion separation membranes in the first direction, thereby forming a flow electrode channel between the pair of porous current collector plates, a pair of communication holes formed in the channel frame and communicating the flow electrode channel to an outside, and an electrode terminal formed in the channel frame and electrically connected to the porous current collector plates.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 29, 2023
    Applicant: Korea University Research and Business Foundation
    Inventors: Seung-Kwan HONG, Ji-Hun LIM
  • Patent number: 11366172
    Abstract: The present invention relates to an apparatus and a method for diagnosing a battery, and comprises: a power conversion unit for discharging and charging a battery; and a control unit for controlling the power conversion unit to discharge and charge the battery, and diagnosing power fade of the battery by calculating a maximum discharge output and a maximum charge output of the battery on the basis of a voltage and a current of the battery measured during discharging and charging of the battery.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: June 21, 2022
    Assignee: KOREA ELECTRIC POWER CORPORATION
    Inventors: Jin Hyeok Choi, Ji Hun Lim, Sung Eun Lee
  • Patent number: 10985281
    Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: April 20, 2021
    Inventors: Ji Hun Lim, Joon Seok Park, Jay Bum Kim, Jun Hyung Lim, Kyoung Seok Son
  • Publication number: 20210011089
    Abstract: The present invention relates to an apparatus and a method for diagnosing a battery, and comprises: a power conversion unit for discharging and charging a battery; and a control unit for controlling the power conversion unit to discharge and charge the battery, and diagnosing power fade of the battery by calculating a maximum discharge output and a maximum charge output of the battery on the basis of a voltage and a current of the battery measured during discharging and charging of the battery.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 14, 2021
    Inventors: Jin Hyeok CHOI, Ji Hun LIM, Sung Eun LEE
  • Publication number: 20200161477
    Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Ji Hun LIM, Joon Seok PARK, Jay Bum KIM, Jun Hyung LIM, Kyoung Seok SON
  • Patent number: 10580902
    Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: March 3, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji Hun Lim, Joon Seok Park, Jay Bum Kim, Jun Hyung Lim, Kyoung Seok Son
  • Patent number: 10396101
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode; a semiconductor member including a channel region overlapping the gate electrode with the gate insulating layer interposed therebetween, and a source region and a drain region that face each other with the channel region interposed therebetween; an interlayer insulating layer on the semiconductor member; a data conductor on the interlayer insulating layer; and a passivation layer on the data conductor, wherein the interlayer insulating layer has a first hole on the channel region.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: August 27, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ji Hun Lim, Joon Seok Park
  • Publication number: 20190139992
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode; a semiconductor member including a channel region overlapping the gate electrode with the gate insulating layer interposed therebetween, and a source region and a drain region that face each other with the channel region interposed therebetween; an interlayer insulating layer on the semiconductor member; a data conductor on the interlayer insulating layer; and a passivation layer on the data conductor, wherein the interlayer insulating layer has a first hole on the channel region.
    Type: Application
    Filed: January 7, 2019
    Publication date: May 9, 2019
    Inventors: JI HUN LIM, Joon Seok Park
  • Patent number: 10217771
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode; a semiconductor member including a channel region overlapping the gate electrode with the gate insulating layer interposed therebetween, and a source region and a drain region that face each other with the channel region interposed therebetween; an interlayer insulating layer on the semiconductor member; a data conductor on the interlayer insulating layer; and a passivation layer on the data conductor, wherein the interlayer insulating layer has a first hole on the channel region.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: February 26, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ji Hun Lim, Joon Seok Park
  • Patent number: 9991287
    Abstract: A thin film transistor array panel includes: a substrate; a semiconductor layer disposed on the substrate; a gate electrode disposed on the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer to not overlap the gate electrode, wherein a first edge of the gate electrode is aligned with a second edge of the semiconductor layer in a direction that is perpendicular to the substrate.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: June 5, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji Hun Lim, Jong Baek Seon, Kyoung Seok Son, Eok Su Kim, Tae Sang Kim
  • Publication number: 20180069132
    Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.
    Type: Application
    Filed: August 30, 2017
    Publication date: March 8, 2018
    Inventors: Ji Hun LIM, Joon Seok PARK, Jay Bum KIM, Jun Hyung LIM, Kyoung Seok SON
  • Patent number: 9870735
    Abstract: A display device includes: a plurality of pixels, wherein each of the plurality of pixels includes at least two double-gate transistors including a first gate electrode and a second gate electrode; conduction between source electrodes and drain electrodes of the at least two double-gate transistors is controlled by a voltage applied to the first gate electrode, and electrical connection between the second gate electrode and the first gate electrode of each of the at least two double-gate transistors is determined depending on a polarity of a voltage applied on average to each of the at least two double-gate transistors.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: January 16, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ji Hun Lim, Yeon Keon Moon, Masataka Kano, Jun Hyung Lim
  • Publication number: 20170373091
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode; a semiconductor member including a channel region overlapping the gate electrode with the gate insulating layer interposed therebetween, and a source region and a drain region that face each other with the channel region interposed therebetween; an interlayer insulating layer on the semiconductor member; a data conductor on the interlayer insulating layer; and a passivation layer on the data conductor, wherein the interlayer insulating layer has a first hole on the channel region.
    Type: Application
    Filed: February 17, 2017
    Publication date: December 28, 2017
    Inventors: JI HUN LIM, Joon Seok Park
  • Publication number: 20170323905
    Abstract: A thin film transistor array panel includes: a substrate; a semiconductor layer disposed on the substrate; a gate electrode disposed on the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer to not overlap the gate electrode, wherein a first edge of the gate electrode is aligned with a second edge of the semiconductor layer in a direction that is perpendicular to the substrate.
    Type: Application
    Filed: April 4, 2017
    Publication date: November 9, 2017
    Inventors: Ji Hun LIM, Jong Baek SEON, Kyoung Seok SON, Eok Su KIM, Tae Sang KIM
  • Patent number: 9685122
    Abstract: A pixel circuit and a display device having the pixel circuit are disclosed. One inventive aspect includes a switching thin-film TFT and a light sensing TFT. The switching thin-film TFT includes a first source electrode electrically connected to a data line. A first gate electrode of the switching thin-film TFT and a second source electrode of the light sensing TFT are electrically connected to a first gate line. A first drain electrode of the switching thin-film TFT and a second drain electrode of the light sensing TFT are electrically connected to a pixel electrode.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: June 20, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji-Hun Lim, Hyeon-Sik Kim, Yeon-Gon Mo, Byung-Du Ahn, Hyang-Shik Kong