Patents by Inventor Ji Hun NOH

Ji Hun NOH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170699
    Abstract: An embodiment antioxidant liquid for a fuel cell is provided. The antioxidant liquid is to be charged in a gas diffusion layer of a fuel cell stack, and the antioxidant liquid includes a solvent, an oxide as a first antioxidant dispersed in the solvent, and a salt as a second antioxidant dissolved in the solvent.
    Type: Application
    Filed: July 3, 2023
    Publication date: May 23, 2024
    Inventors: Seung Tak Noh, Jae Man Park, Hyun Jae Kim, Ji Hoon Sohn, Seon Yong Lee, Seung Hun Kang
  • Publication number: 20240096603
    Abstract: The inventive concept provides a substrate treating apparatus. The substrate treating apparatus includes an electrode plate applied with a power; an ion blocker positioned at a bottom side of the electrode plate, which has a plurality of top holes formed thereon, and which is grounded; a shower head positioned at a bottom side of the ion blocker and which has a plurality of bottom holes formed thereon; and a turbulence generating unit configured to have a turbulence space therein, and which is positioned at a space between the ion blocker and the shower head, and wherein the top hole is positioned to overlap the turbulence space when seen from above, and the bottom hole is positioned at an outer side of the turbulence space, and which faces at least one of a bottom surface of the ion blocker and an outer wall of the turbulence generating unit when seen from below.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 21, 2024
    Applicant: SEMES CO., LTD.
    Inventors: Dong-Hun KIM, Wan Jae PARK, Dong Sub OH, Myoung Sub NOH, Ji Hoon PARK
  • Publication number: 20230328967
    Abstract: A semiconductor memory device may include a substrate including an active area defined by an element isolation layer on the substrate, a word line crossing the active area and extending in a first direction, a bit line crossing the active area on the substrate and extending in a second direction, and a bit line contact directly connected to the bit line and the active area. The bit line contact may be between the substrate and the bit line. The bit line contact may include a lower bit line contact directly connected to the active area and an upper bit line contact on and in contact with the lower bit line contact. A width of an upper surface of the lower bit line contact in the second direction may be greater than a width of a lower surface of the upper bit line contact in the second direction.
    Type: Application
    Filed: December 16, 2022
    Publication date: October 12, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ji Hun NOH, Beom Seo KIM, Sung Gil KIM
  • Publication number: 20230328963
    Abstract: A semiconductor memory device including a substrate including an active area defined by an element isolation layer, a bit line extending in a first direction on the substrate, a storage contact on each of both sides of the bit line and connected to the active area, a storage pad on the storage contact and connected to the storage contact and an information storage portion on the storage pad and connected to the storage pad, wherein the storage contact includes a lower storage contact and an upper storage contact on the lower storage contact, at least a portion of the lower storage contact is in the substrate, an entire upper surface of the lower storage contact is in contact with an entire lower surface of the upper storage contact, and each of the lower storage contact and the upper storage contact includes a semiconductor material may be provided.
    Type: Application
    Filed: December 6, 2022
    Publication date: October 12, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Beom Seo KIM, Sung Gil KIM, Ji Hun NOH