Patents by Inventor Ji-Ping Li
Ji-Ping Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10909024Abstract: A system and method are provided for testing electronic visual user interface outputs. The method includes obtaining a baseline set of one or more screen shots of a user interface, the user interface comprising one or more elements; generating an updated set of one or more screen shots of the user interface, the updated set comprising one or more changes to the user Interface; comparing the baseline set to the updated set to generate a differential set of one or more images illustrating differences in how at least one of the user interface elements is rendered.Type: GrantFiled: April 19, 2018Date of Patent: February 2, 2021Assignee: Think Research CorporationInventors: Ji Ping Li, Benjamin Thomas Hare
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Publication number: 20190324890Abstract: A system and method are provided for testing electronic visual user interface outputs. The method includes obtaining a baseline set of one or more screen shots of a user interface, the user interface comprising one or more elements; generating an updated set of one or more screen shots of the user interface, the updated set comprising one or more changes to the user Interface; comparing the baseline set to the updated set to generate a differential set of one or more images illustrating differences in how at least one of the user interface elements is rendered.Type: ApplicationFiled: April 19, 2018Publication date: October 24, 2019Applicant: Think Research CorporationInventors: Ji Ping LI, Benjamin Thomas HARE
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Patent number: 7301619Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: GrantFiled: June 16, 2006Date of Patent: November 27, 2007Assignee: Applied Materials, Inc.Inventors: Peter G. Borden, Ji-Ping Li
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Patent number: 7141440Abstract: A property of a layer is measured by: (1) focusing a heating beam on a region (also called “heated region”) of a conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of an optically absorbing layer is approximately equal to (e.g., within 90% of) a temperature of the optically absorbing layer when heated by an unmodulated beam, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit area) of a conductive pad formed by patterning the conductive layer. Change in measurement across regions indicates a corresponding change in resistance of the layer.Type: GrantFiled: May 2, 2005Date of Patent: November 28, 2006Assignee: Applied Materials, Inc.Inventors: Peter G. Borden, Ji Ping Li
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Publication number: 20060232768Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: ApplicationFiled: June 16, 2006Publication date: October 19, 2006Inventors: Peter Borden, Ji-Ping Li
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Patent number: 7088444Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: GrantFiled: November 8, 2004Date of Patent: August 8, 2006Assignee: Applied Materials, Inc.Inventors: Peter G. Borden, Ji-Ping Li
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Patent number: 7064822Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. One of the two measurements is of resistance per unit length. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: GrantFiled: April 25, 2005Date of Patent: June 20, 2006Assignee: Applied Materials, Inc.Inventors: Peter G. Borden, Ji-Ping Li
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Patent number: 6971791Abstract: Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.Type: GrantFiled: March 1, 2002Date of Patent: December 6, 2005Assignee: Boxer Cross, INCInventors: Peter G. Borden, Ji-Ping Li
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Patent number: 6958814Abstract: An apparatus measures a property of a layer (such as the sheet resistance of a conductive layer) by performing the following method: (1) focusing the heating beam on the heated a region (also called “heated region”) of the conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of the optically absorbing layer is approximately equal to (e.g., within 90% of) a temperature of the optically absorbing layer when heated by an unmodulated beam, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit area) of a conductive pad formed by patterning the conductive layer.Type: GrantFiled: March 1, 2002Date of Patent: October 25, 2005Assignee: Applied Materials, Inc.Inventors: Peter G. Borden, Ji Ping Li
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Publication number: 20050186776Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. One of the two measurements is of resistance per unit length. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: ApplicationFiled: April 25, 2005Publication date: August 25, 2005Inventors: Peter Borden, Ji-Ping Li
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Publication number: 20050112788Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: ApplicationFiled: November 8, 2004Publication date: May 26, 2005Inventors: Peter Borden, Ji-Ping Li
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Patent number: 6885444Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: GrantFiled: March 1, 2002Date of Patent: April 26, 2005Assignee: Boxer Cross IncInventors: Peter G. Borden, Ji-Ping Li
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Publication number: 20030165178Abstract: Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.Type: ApplicationFiled: March 1, 2002Publication date: September 4, 2003Inventors: Peter G. Borden, Ji-Ping Li
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Publication number: 20030164946Abstract: An apparatus measures a property of a layer (such as the sheet resistance of a conductive layer) by performing the following method: (1) focusing the heating beam on the heated a region (also called “heated region”) of the conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of the optically absorbing layer is approximately equal to (e.g., within 90% of) a temperature of the optically absorbing layer when heated by an unmodulated beam, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit area) of a conductive pad formed by patterning the conductive layer.Type: ApplicationFiled: March 1, 2002Publication date: September 4, 2003Inventors: Peter G. Borden, Ji Ping Li
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Publication number: 20020125905Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.Type: ApplicationFiled: March 1, 2002Publication date: September 12, 2002Inventors: Peter G. Borden, Ji-Ping Li
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Patent number: 5415126Abstract: A method of forming crystalline silicon carbide films is disclosed. The method comprises a chemical vapor deposition process in which a substrate is heated to a temperature above about 600.degree. C. in the presence of a silicon containing cyclobutane gas.Type: GrantFiled: August 16, 1993Date of Patent: May 16, 1995Assignee: Dow Corning CorporationInventors: Mark J. Loboda, Ji-Ping Li, Andrew J. Steckl, Chong Yuan