Patents by Inventor Ji Qi

Ji Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170166586
    Abstract: The present invention is directed to a process for making Tetracyclic Heterocycle Compounds of Formula (I) and pharmaceutically acceptable salts thereof, wherein X1, X2, R1, R2 and R3 are defined above herein. The present invention is also directed to compounds that are useful as synthetic intermediates in the process of the invention.
    Type: Application
    Filed: July 10, 2015
    Publication date: June 15, 2017
    Inventors: Hongming Li, Jingjun Yin, Kevin M. Belyk, Kevin R. Campos, Qinghao Chen, Alan M. Hyde, Tetsuji Itoh, Artis Klapars, Matthew Thomas Tudge, Edward Cleator, Aaron M. Dumas, Louis-Charles Campeau, Yonggang Chen, Ji Qi, Wensong Xiao
  • Publication number: 20160251375
    Abstract: The present invention includes compounds useful as intermediates in the preparation of macrolactams, methods for preparing the intermediates, and methods for preparing macrolactams. One use of the methods and intermediates described herein is in the production of macrolactam compounds able to inhibit HCV NS3 protease activity. HCV NS3 inhibitory compounds have therapeutic and research applications.
    Type: Application
    Filed: October 14, 2014
    Publication date: September 1, 2016
    Applicant: Merck Sharp & Dohme Corp.
    Inventors: Feng XU, Richard DESMOND, Guy R. HUMPHREY, Hongming LI, Ji QI, Rebecca T. RUCK, Zhiguo Jake SONG, Tao WANG, Yong-Li ZHONG, Jeonghan PARK, Laura Marie ARTINO, Richard John VARSOLONA
  • Publication number: 20150213163
    Abstract: The present invention provides a GPU-based particle flow simulation system and method which includes generating particle information based on particle modeling information inputted from a client terminal, and generating geometric solid information; receiving the particle information and the geometric solid information, determining which GPUs of which computation nodes are to be used based on the number of the particles and the number of idle GPUs in each of the computation nodes; determining which particles are to be processed in which GPUs of which computation nodes based on the determined number of GPUs and a space distribution of the particles, and performing allocation according to the determination result; stimulating particle flow by computing in parallel in the plurality of GPUs a force applied to each particle due to particle collision and thus an acceleration; and presenting a stimulation result.
    Type: Application
    Filed: May 22, 2013
    Publication date: July 30, 2015
    Inventors: Lei Yang, Ji Qi, Yuan Tian, Xiaofei Gao
  • Patent number: 8667202
    Abstract: A method of powering on a server is provided, wherein the server includes power consumption modules with the same functions, connectors, and a BIOS (Basic Input/Output System). The power consumption modules are connected to the server via the connectors respectively. This method includes the steps as follows. At first, the BIOS detects a delay power-up setting. When the delay power-up setting is detected, the BIOS staggers initialization times of the connectors, so that the connectors can be initialized respectively. When one of the connectors has been initialized, the connector is electrically connected to the corresponding power consumption module, so that the power consumption module can be delayed to be powered on.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: March 4, 2014
    Assignee: Inventec Corporation
    Inventors: Zhong-Ji Qi, Zhong-Ying Qu
  • Publication number: 20120137113
    Abstract: A method of powering on a server is provided, wherein the server includes power consumption modules with the same functions, connectors, and a BIOS (Basic Input/Output System). The power consumption modules are connected to the server via the connectors respectively. This method includes the steps as follows. At first, the BIOS detects a delay power-up setting. When the delay power-up setting is detected, the BIOS staggers initialization times of the connectors, so that the connectors can be initialized respectively. When one of the connectors has been initialized, the connector is electrically connected to the corresponding power consumption module, so that the power consumption module can be delayed to be powered on.
    Type: Application
    Filed: January 18, 2011
    Publication date: May 31, 2012
    Applicant: INVENTEC CORPORATION
    Inventors: Zhong-Ji QI, Zhong-Ying QU
  • Patent number: 7792879
    Abstract: A method comprising calculating first and second allocation speeds respectively for at least a first space and a second space in a runtime environment's memory space; and partitioning the runtime environment's memory space in proportion to said first and second space's respective allocation speeds so that the first space is filled to a first threshold level approximately at the same time as the second space is filled to a second threshold level.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: September 7, 2010
    Assignee: Intel Corporation
    Inventors: Ji Qi, Xiao-Feng Li
  • Publication number: 20090234897
    Abstract: A method comprising calculating first and second allocation speeds respectively for at least a first space and a second space in a runtime environment's memory space; and partitioning the runtime environment's memory space in proportion to said first and second space's respective allocation speeds so that the first space is filled to a first threshold level approximately at the same time as the second space is filled to a second threshold level.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 17, 2009
    Inventors: Ji Qi, Xiao-Feng Li