Abstract: Embodiments of the disclosed technology relate to a memory device, a memory system, and an operation method of the memory device. Based on embodiments of the disclosed technology, the memory device may include a reception circuit configured to receive a target command, wherein the target command is a command that is intended for a memory device to execute, from a memory controller; a determination circuit configured to determine whether or not the target command is inexecutable by the memory device; and a response circuit configured to transmit a response message in response to a status-read command received from the memory controller to inform the memory controller regarding whether or not the target command is inexecutable. Accordingly, it is possible to identify information indicating that an inexecutable command is input to the memory device and to eliminate defects caused by an inexecutable command input to the memory device.

Abstract: A data storage device includes at least one nonvolatile memory device; and a controller suitable for: generating parity data for data; performing a write operation for storing the data in at least one first memory region corresponding to at least one word line of the nonvolatile memory device; and selectively storing the parity data in at least one second memory region corresponding to the word line according to a size of the data, wherein the controller generates a plurality of parity data for the data according to respective types of the first memory region where the data are to be stored, and performs the write operation by storing parity data corresponding to respective types of the second memory region among the plurality of parity data, in the second memory region.

Abstract: A nonvolatile memory device includes a memory cell region including an external data area and an internal data area; and a control logic suitable for storing history data collected based on control signals received from an external device, in the internal data area, and controlling an operation for the external data area according to the control signals.

Abstract: A data storage device includes at least one nonvolatile memory device; and a controller suitable for: generating parity data for data; performing a write operation for storing the data in at least one first memory region corresponding to at least one word line of the nonvolatile memory device; and selectively storing the parity data in at least one second memory region corresponding to the word line according to a size of the data, wherein the controller generates a plurality of parity data for the data according to respective types of the first memory region where the data are to be stored, and performs the write operation by storing parity data corresponding to respective types of the second memory region among the plurality of parity data, in the second memory region.

Abstract: A semiconductor device having a memory block which includes a plurality of pages and an operation circuit suitable for performing a program operation on memory cells included in an erase page when the erase page is detected among the plurality of pages through an erase page check operation, and performing an erase loop on the memory block after the program operation.