Abstract: Provided is a method of improving skin condition by applying to the skin of a subject a cosmetic composition comprising black yeast-derived exosomes as an active ingredient and thereby improving the skin condition, particularly skin elasticity improvement, skin wrinkle reduction, skin texture improvement, skin tone improvement, skin brightness improvement, skin regeneration, skin moisturization, and/or whitening.

Abstract: Disclosed are wood preforming devices for manufacturing a crash pad for a vehicle including a real wood sheet. A wood preforming device for manufacturing a crash pad for a vehicle includes a real wood sheet includes a lower press mold comprising a debossed portion provided on a portion on which a product is formed, and a support portion configured to support an upper press mold, in response to the lower press mold and the upper press mold pressing each other, the support portion having a protrusion for fixing a real wood sheet, the upper press mold having an embossed portion corresponding to the debossed portion of the lower press mold, and a movable core provided on the debossed portion of the lower press mold and being configured to guide the real wood sheet by moving upward from the debossed portion, in response to the upper press mold moving downward.

Abstract: A glass stress test method includes breaking a glass, analyzing a shape of a crack of a broken portion of the glass in a plan view, finding a breakage origin of the glass based on the shape of the crack in the plan view, analyzing a cross-section of the breakage origin, and calculating a stress of the glass based on a cross-sectional analysis result of the breakage origin. The stress of the glass is calculated as a value proportional to a floor constant defined by a condition of a floor surface disposed when the glass is broken.

Abstract: Disclosed is a method for pre-detecting a defective porous polymer substrate for a separator, including selecting a porous polymer substrate having a plurality of pores; observing the selected porous polymer substrate with a scanning electron microscope (SEM) to obtain an image of the porous polymer substrate; quantifying the average value of pore distribution index (PDI); correcting the quantified average value of pore distribution index to obtain the corrected average value of pore distribution index; determining whether or not the corrected average value of pore distribution index is 60 a.u. (arbitrary unit) or less; and classifying the porous polymer substrate as a good product, when the corrected average value of pore distribution index is determined to be 60 a.u. or less, and classifying the porous polymer substrate as a defective product, when the corrected average value of pore distribution index is determined to be larger than 60 a.u.

Abstract: The present disclosure relates to the composition and process for the production of an ultra-strong, biocompatible, electroconductive, and stretchable hydrogel, which comprises: a step (a) of physical or chemical modification of natural polymers e.g., preparation of silk nanofiber and double methacrylation of gelatin; a step (b) of graphene oxide (GO) carboxylation; a step (c) of carbodiimidation between methacrylated natural polymers of step (a) and carboxylated GO of step (b); and a step (d) of three dimensional (3D) bioprinting of step (c) with/without silk nanofiber. It was found that these steps in this disclosure give rise to a biocompatible hydrogel with high mechanical strength in the range of load-bearing soft tissue such as tendon and heart as opposed to conventional hydrogels.

Abstract: An integrated circuit device includes a device isolation trench defining an active area, a gate trench extending in a first direction across the active area and the device isolation film, a gate dielectric film covering an inner wall of the gate trench, and a conductive line filling a part of the gate trench above the gate dielectric film. The active area includes a fin body portion located under the conductive line, and a thinner fin portion protruding from the fin body portion toward the conductive line and having a width less than a width of the fin body portion in the first direction.

Abstract: An integrated circuit device includes a device isolation trench defining an active area, a gate trench extending in a first direction across the active area and the device isolation film, a gate dielectric film covering an inner wall of the gate trench, and a conductive line filling a part of the gate trench above the gate dielectric film. The active area includes a fin body portion located under the conductive line, and a thinner fin portion protruding from the fin body portion toward the conductive line and having a width less than a width of the fin body portion in the first direction.

Abstract: An integrated circuit device includes a device isolation trench defining an active area, a gate trench extending in a first direction across the active area and the device isolation film, a gate dielectric film covering an inner wall of the gate trench, and a conductive line filling a part of the gate trench above the gate dielectric film. The active area includes a fin body portion located under the conductive line, and a thinner fin portion protruding from the fin body portion toward the conductive line and having a width less than a width of the fin body portion in the first direction.

Abstract: An integrated circuit device includes a device isolation trench defining an active area, a gate trench extending in a first direction across the active area and the device isolation film, a gate dielectric film covering an inner wall of the gate trench, and a conductive line filling a part of the gate trench above the gate dielectric film. The active area includes a fin body portion located under the conductive line, and a thinner fin portion protruding from the fin body portion toward the conductive line and having a width less than a width of the fin body portion in the first direction.

Abstract: An integrated circuit device includes a device isolation trench defining an active area, a gate trench extending in a first direction across the active area and the device isolation film, a gate dielectric film covering an inner wall of the gate trench, and a conductive line filling a part of the gate trench above the gate dielectric film. The active area includes a fin body portion located under the conductive line, and a thinner fin portion protruding from the fin body portion toward the conductive line and having a width less than a width of the fin body portion in the first direction.

Abstract: A semiconductor device includes a substrate including spaced-apart active regions, and device isolating regions isolating the active regions from each other, and a pillar array pattern including a plurality of pillar patterns overlapping the active regions, the plurality of pillar patterns being spaced apart from each other at an equal distance in a first direction and in a second direction intersecting the first direction, wherein the plurality of pillar patterns include first pillar patterns and second pillar patterns disposed alternatingly in the first direction and in the second direction, a shape of a horizontal cross section of the first pillar patterns being different from a shape of a horizontal cross section of the second pillar patterns.

Abstract: Methods of fabricating an integrated circuit device are provided. The methods may form feature patterns on a substrate using a quadruple patterning technology (QPT) process including one photolithography process and two double patterning processes. Sacrificial spacers obtained by first double patterning process and spacers obtained by second double patterning process may be formed on a feature layer at an equal level.

Abstract: An integrated circuit device includes a device isolation trench defining an active area, a gate trench extending in a first direction across the active area and the device isolation film, a gate dielectric film covering an inner wall of the gate trench, and a conductive line filling a part of the gate trench above the gate dielectric film. The active area includes a fin body portion located under the conductive line, and a thinner fin portion protruding from the fin body portion toward the conductive line and having a width less than a width of the fin body portion in the first direction.

Abstract: Methods of fabricating an integrated circuit device are provided. The methods may form feature patterns on a substrate using a quadruple patterning technology (QPT) process including one photolithography process and two double patterning processes. Sacrificial spacers obtained by first double patterning process and spacers obtained by second double patterning process may be formed on a feature layer at an equal level.

Abstract: A semiconductor device includes a substrate including spaced-apart active regions, and device isolating regions isolating the active regions from each other, and a pillar array pattern including a plurality of pillar patterns overlapping the active regions, the plurality of pillar patterns being spaced apart from each other at an equal distance in a first direction and in a second direction intersecting the first direction, wherein the plurality of pillar patterns include first pillar patterns and second pillar patterns disposed alternatingly in the first direction and in the second direction, a shape of a horizontal cross section of the first pillar patterns being different from a shape of a horizontal cross section of the second pillar patterns.

Abstract: A semiconductor device includes a substrate including spaced-apart active regions, and device isolating regions isolating the active regions from each other, and a pillar array pattern including a plurality of pillar patterns overlapping the active regions, the plurality of pillar patterns being spaced apart from each other at an equal distance in a first direction and in a second direction intersecting the first direction, wherein the plurality of pillar patterns include first pillar patterns and second pillar patterns disposed alternatingly in the first direction and in the second direction, a shape of a horizontal cross section of the first pillar patterns being different from a shape of a horizontal cross section of the second pillar patterns.

Abstract: A semiconductor device includes a substrate including spaced-apart active regions, and device isolating regions isolating the active regions from each other, and a pillar array pattern including a plurality of pillar patterns overlapping the active regions, the plurality of pillar patterns being spaced apart from each other at an equal distance in a first direction and in a second direction intersecting the first direction, wherein the plurality of pillar patterns include first pillar patterns and second pillar patterns disposed alternatingly in the first direction and in the second direction, a shape of a horizontal cross section of the first pillar patterns being different from a shape of a horizontal cross section of the second pillar patterns.

Abstract: Disclosed is a method for electronic examination of medical fees, and more particularly to a method for electronic examination of medical fees using a system for electronic examination of medical fees. The system includes a transmit/receive server, a bill examination server, a management terminal and examiner terminals, and communicates with each medical institution server and a national health insurance corporation server. The bill examination server checks any error in medical bills and specifications received from each medical institution server through description inspection, automatic inspection, specialist inspection and computational examination. The bill examination server returns, corrects or adjusts any erroneous bill or specification, or inserts a message into the erroneous bill or specification. The management terminal distributes medical bills and specifications on which computational examination has been completed to the examiner terminals.

Abstract: Disclosed is a method for electronic examination of medical fees, and more particularly to a method for electronic examination of medical fees using a system for electronic examination of medical fees. The system includes a transmit/receive server, a bill examination server, a management terminal and examiner terminals, and communicates with each medical institution server and a national health insurance corporation server. The bill examination server checks any error in medical bills and specifications received from each medical institution server through description inspection, automatic inspection, specialist inspection and computational examination. The bill examination server returns, corrects or adjusts any erroneous bill or specification, or inserts a message into the erroneous bill or specification. The management terminal distributes medical bills and specifications on which computational examination has been completed to the examiner terminals.