Patents by Inventor Ji-Sun Hong

Ji-Sun Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10068878
    Abstract: Provided are a printed circuit board (PCB) capable of blocking introduction of impurities during a molding process so as to reduce damage on a semiconductor package, a method of manufacturing the PCB, and a method of manufacturing a semiconductor package by using the PCB. An embodiment includes an apparatus comprising: a substrate body comprising an active area and a dummy area on an outer portion of the active area, the substrate body extending lengthwise in a first direction; a plurality of semiconductor units mounted on the active area; and a barrier formed on the dummy area, wherein the barrier extends in the first direction.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: September 4, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-gyu Kim, Ji-sun Hong, Su-jung Hyung, Hyun-ki Kim, Hyun Lee
  • Publication number: 20170040293
    Abstract: Provided are a printed circuit board (PCB) capable of blocking introduction of impurities during a molding process so as to reduce damage on a semiconductor package, a method of manufacturing the PCB, and a method of manufacturing a semiconductor package by using the PCB. An embodiment includes an apparatus comprising: a substrate body comprising an active area and a dummy area on an outer portion of the active area, the substrate body extending lengthwise in a first direction; a plurality of semiconductor units mounted on the active area; and a barrier formed on the dummy area, wherein the barrier extends in the first direction.
    Type: Application
    Filed: July 20, 2016
    Publication date: February 9, 2017
    Inventors: Jin-gyu KIM, Ji-sun HONG, Su-jung HYUNG, Hyun-ki KIM, Hyun LEE
  • Patent number: 8829686
    Abstract: A package-on-package assembly includes first and second packages and an adhesion member positioned between the first and second packages and adhering the first and second packages to one another. The first package may include a first substrate having a first surface and a second surface facing each other and including a land pad formed on the first surface, a first semiconductor chip formed on the first surface, and a first encapsulant member encapsulating the first surface and the first semiconductor chip and including a through-via spaced apart from the first semiconductor chip and exposing the land pad and a trench formed between the first semiconductor chip and the through-via, and wherein at least a portion of the trench is filled with adhesion member material.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: September 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-Sun Hong, Young-Min Kim, Jung-Woo Kim, Min-Ok Na, Hyo-Chang Ryu, Jong-Bo Shim
  • Patent number: 8563349
    Abstract: A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: October 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Yun Myung, Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Un-Byoung Kang, Hyung-Sun Jang, Eun-Mi Kim, Jung-Hwan Kim, Tae-Hong Min
  • Patent number: 8304288
    Abstract: A method of packaging a semiconductor device may include providing a semiconductor substrate including first and second spaced apart semiconductor chip areas, and adhering a cover on the first and second spaced apart semiconductor chip areas of the semiconductor substrate. A scribe line may be formed through the semiconductor substrate between the first and second semiconductor chip areas with a semiconductor bridge pattern remaining connected between the first and second spaced apart semiconductor chip areas after forming the scribe line. The cover and the semiconductor bridge pattern may then be cut after forming the scribe line.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: November 6, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Jong-Yun Myung, Young-Bok Kim, Hyung-Sun Jang, Eun-Mi Kim
  • Publication number: 20120193783
    Abstract: A package on package is provided herein, the package on package including a first semiconductor package including a first substrate, a first semiconductor chip stacked on the first substrate, a plurality of first connection members on an upper surface of the first substrate and in a first molding material, and a plurality of via holes which respectively expose the plurality of first connection members through the first molding material; a second semiconductor package including a second substrate, a second semiconductor chip stacked on the second substrate, and a plurality of second connection members on a lower surface of the second substrate; and a plurality of connection portions including a plurality of cores and a plurality of conductive fusion layers surrounding the plurality of cores, wherein the plurality of conductive fusion layers contact the upper surface of the first substrate and the lower surface of the second substrate.
    Type: Application
    Filed: December 30, 2011
    Publication date: August 2, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-Sun HONG, Dae-Young CHOI, Mi-Yeon KIM
  • Publication number: 20120156823
    Abstract: A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
    Type: Application
    Filed: October 26, 2011
    Publication date: June 21, 2012
    Inventors: Jong-Yun MYUNG, Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Un-Byoung Kang, Hyung-Sun Jang, Eun-Mi Kim, Jung-Hwan Kim, Tae-Hong Min
  • Publication number: 20110306167
    Abstract: A method of packaging a semiconductor device may include providing a semiconductor substrate including first and second spaced apart semiconductor chip areas, and adhering a cover on the first and second spaced apart semiconductor chip areas of the semiconductor substrate. A scribe line may be formed through the semiconductor substrate between the first and second semiconductor chip areas with a semiconductor bridge pattern remaining connected between the first and second spaced apart semiconductor chip areas after forming the scribe line. The cover and the semiconductor bridge pattern may then be cut after forming the scribe line.
    Type: Application
    Filed: June 8, 2011
    Publication date: December 15, 2011
    Inventors: Hyuek-Jae Lee, Ji-Sun Hong, Tae-je Cho, Jong-Yun Myung, Young-Bok Kim, Hyung-Sun Jang, Eun-Mi Kim
  • Publication number: 20090057845
    Abstract: An apparatus to saw a wafer and having a nozzle to remove burrs in scribe lanes, a method of sawing a wafer, and a semiconductor package fabricated by the same. The apparatus includes a blade to cut scribe lanes of the wafer and a burr removing nozzle disposed spaced apart from the blade. The burr removing nozzle removes metal burrs generated adjacent to the blade during cutting the wafer.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 5, 2009
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Ji-Sun Hong, Seung-Kon Mok, Tae-Hun Kim
  • Patent number: 7379113
    Abstract: In one embodiment, an image sensor module having an auto-aligned lens includes: a substrate on which an image sensor chip is mounted; a housing which has an opening to expose an upper surface of the image sensor chip, and which is attached onto the substrate; a lens holder which extends the opening vertically and upwardly; and a lens unit incorporating spacers which is fixed to an inner sidewall of the lens holder and is aligned automatically. Friction-caused particles are not produced, and focal alignment is readily automated.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: May 27, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yung-Cheol Kong, Tai-Hyun Eum, Ji-Sun Hong, Sung-Woo Park
  • Publication number: 20050237415
    Abstract: In one embodiment, an image sensor module having an auto-aligned lens includes: a substrate on which an image sensor chip is mounted; a housing which has an opening to expose an upper surface of the image sensor chip, and which is attached onto the substrate; a lens holder which extends the opening vertically and upwardly; and a lens unit incorporating spacers which is fixed to an inner sidewall of the lens holder and is aligned automatically. Friction-caused particles are not produced, and focal alignment is readily automated.
    Type: Application
    Filed: April 21, 2005
    Publication date: October 27, 2005
    Inventors: Yung-Cheol Kong, Tai-Hyun Eum, Ji-Sun Hong, Sung-Woo Park