Patents by Inventor Ji-Yeon Baek

Ji-Yeon Baek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230328993
    Abstract: The present technology includes a memory device and a method of manufacturing the same. The memory device includes a source line including a plurality of source layers and a buffer layer, the buffer layer being formed between the plurality of source layers, a stack structure formed on the source line, a cell plug contacting the source line by passing through the stack structure, a slit separating the stack structure, and a source contact formed in the slit and contacting the source line.
    Type: Application
    Filed: September 22, 2022
    Publication date: October 12, 2023
    Applicant: SK hynix Inc.
    Inventors: Chul Young KIM, Jin Ho BIN, Sun Woo KIM, Ah Reum BAHK, Ji Yeon BAEK
  • Publication number: 20230320095
    Abstract: A method of manufacturing a semiconductor memory device includes forming a preliminary source structure including a source sacrificial layer, forming a preliminary stacked structure including insulating layers and first sacrificial layers over the preliminary source structure, forming a slit passing through the preliminary stacked structure, removing the first sacrificial layers through the slit to define first recess regions between the insulating layers, forming a second sacrificial layer in each of the first recess regions, removing the source sacrificial layer through the slit to define a second recess region, and forming a source channel coupling layer in the second recess region.
    Type: Application
    Filed: September 27, 2022
    Publication date: October 5, 2023
    Applicant: SK hynix Inc.
    Inventors: Jin Ho BIN, Chul Young KIM, Ji Yeon BAEK, Sul Gi JUNG
  • Publication number: 20230299006
    Abstract: There are provided a memory device and a manufacturing method of the memory device. The memory device includes: a source line; a stack structure formed on the source line; a cell plug penetrating the stack structure and contacting the source line; a slit separating the stack structure; a source contact formed in the slit, the source contact in contact with the source line; and a compensation plug formed below the cell plug in the source line, wherein the compensation plug contains an impurity that has a higher concentration than an impurity that is contained in the source line.
    Type: Application
    Filed: August 9, 2022
    Publication date: September 21, 2023
    Applicant: SK hynix Inc.
    Inventors: Chul Young KIM, Jin Ho BIN, Ji Yeon BAEK, Sul Gi JUNG
  • Publication number: 20230292514
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Application
    Filed: May 17, 2023
    Publication date: September 14, 2023
    Inventors: Ki Hong LEE, Ji Yeon BAEK, Seung Ho PYI
  • Patent number: 11678487
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: June 13, 2023
    Assignee: SK hynix Inc.
    Inventors: Ki Hong Lee, Ji Yeon Baek, Seung Ho Pyi
  • Publication number: 20220020462
    Abstract: A prescription with alternative medications purchasable in a residing country of a patient receiving a telemedicine service, based on a prescription issued by a hospital or doctor of a country providing the telemedicine service, is provided to the patient such that the patient receives suitable and stable subsequent treatment through medications in the residing country after receiving the telemedicine service.
    Type: Application
    Filed: December 17, 2020
    Publication date: January 20, 2022
    Applicant: HICARENET INC.
    Inventors: Hong Jin KIM, Gwun Il Park, Ji Yeon Baek
  • Publication number: 20220008414
    Abstract: The present invention relates to a pharmaceutical composition for preventing or treating CMT disease, comprising histone deacetylase 6 inhibitor. The pharmaceutical composition according to the present invention has histone deacetylase 6 (HDAC6) inhibitory activity and thus is effective in preventing or treating CMT disease.
    Type: Application
    Filed: November 22, 2019
    Publication date: January 13, 2022
    Inventors: Young II Choi, Nina Ha, Ju Young Song, Min Cheol Kim, Daekwon Bae, Ji Yeon Baek
  • Patent number: 11169629
    Abstract: A touch screen and a display device having the same are disclosed. The touch screen includes an insulating substrate including a sensing region and a peripheral region, a plurality of sensing electrodes disposed in the sensing region, a plurality of wirings disposed in the peripheral region and electrically connected to the plurality of sensing electrodes, a plurality of pads disposed in the peripheral region and electrically connected to the plurality of wirings, an optical film disposed on an upper portion of the plurality of sensing electrodes, a flexible circuit board electrically connected to the plurality of pads, and a reinforcing member disposed on the flexible circuit board corresponding to the plurality of pads, wherein a first height measured from the insulating substrate to an upper surface of the reinforcing member is equal to a second height measured from the insulating substrate to an upper surface of the optical film.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: November 9, 2021
    Inventors: Ji Yeon Baek, Mi Young Kim, Chang Bum Kim, Jung Mok Park, Young Seok Yoo, Byeong Kyu Jeon, Hee Yeon Choi
  • Publication number: 20210143175
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Application
    Filed: January 18, 2021
    Publication date: May 13, 2021
    Inventors: Ki Hong LEE, Ji Yeon BAEK, Seung Ho PYI
  • Patent number: 10923497
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: February 16, 2021
    Assignee: SK hynix Inc.
    Inventors: Ki Hong Lee, Ji Yeon Baek, Seung Ho Pyi
  • Patent number: 10656058
    Abstract: The present invention relates to a material for aggregating blood cells, used in the preparation of a paraffin block for diagnosing circulating tumor cells (CTCs), and a method for preparing a paraffin block using the same, and more specifically, to a method for detecting CTCs present in the blood through blood sample collection in the preparation of a paraffin block from CTCs, which are present in a very small amount in the blood. The present invention is non-invasive and simple, and thus is very useful for the diagnosis of cancer recurrence and metastatic cancer and for prognosis prediction, and can be a remarkable breakthrough in cancer treatment through the analysis of the onset, metastasis and recurrence mechanisms of cancer.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: May 19, 2020
    Assignee: NATIONAL CANCER CENTER
    Inventors: Hee Jin Chang, Sun Young Kim, Ji Yeon Baek, Hyun Yang Yeo
  • Publication number: 20200089347
    Abstract: A touch screen and a display device having the same are disclosed. The touch screen includes an insulating substrate including a sensing region and a peripheral region, a plurality of sensing electrodes disposed in the sensing region, a plurality of wirings disposed in the peripheral region and electrically connected to the plurality of sensing electrodes, a plurality of pads disposed in the peripheral region and electrically connected to the plurality of wirings, an optical film disposed on an upper portion of the plurality of sensing electrodes, a flexible circuit board electrically connected to the plurality of pads, and a reinforcing member disposed on the flexible circuit board corresponding to the plurality of pads, wherein a first height measured from the insulating substrate to an upper surface of the reinforcing member is equal to a second height measured from the insulating substrate to an upper surface of the optical film.
    Type: Application
    Filed: April 16, 2019
    Publication date: March 19, 2020
    Inventors: Ji Yeon BAEK, Mi Young KIM, Chang Bum KIM, Jung Mok PARK, Young Seok YOO, Byeong Kyu JEON, Hee Yeon CHOI
  • Patent number: 10559587
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: February 11, 2020
    Assignee: SK hynix Inc.
    Inventors: Ki Hong Lee, Ji Yeon Baek, Seung Ho Pyi
  • Publication number: 20190206892
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Application
    Filed: March 11, 2019
    Publication date: July 4, 2019
    Inventors: Ki Hong LEE, Ji Yeon BAEK, Seung Ho PYI
  • Patent number: 10269827
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: April 23, 2019
    Assignee: SK hynix Inc.
    Inventors: Ki Hong Lee, Ji Yeon Baek, Seung Ho Pyi
  • Patent number: 10234999
    Abstract: An apparatus for sensing a touch pressure includes: a substrate; a touch sensor provided on one surface of the substrate; a first pressure sensing electrode provided on the other surface opposite to the one surface of the substrate; a protective layer provided on the first pressure sensing electrode, the protective layer including a first opening area through which a portion of the first pressure sensing electrode is exposed; a flexible circuit board electrically connecting the touch sensor and the first pressure sensing electrode to each other; and a conductive member disposed in the first opening area, the conductive member electrically connecting the first pressure sensing electrode and the flexible circuit board to each other.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: March 19, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji Yeon Baek, Ji Yun Bang, Seung Min Lee, Jang Hwang Jeon, Chang Sub Jung
  • Publication number: 20180254285
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Application
    Filed: May 3, 2018
    Publication date: September 6, 2018
    Inventors: Ki Hong LEE, Ji Yeon BAEK, Seung Ho PYI
  • Patent number: 9991279
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: June 5, 2018
    Assignee: SK Hynix Inc.
    Inventors: Ki Hong Lee, Ji Yeon Baek, Seung Ho Pyi
  • Publication number: 20180097012
    Abstract: A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.
    Type: Application
    Filed: November 22, 2017
    Publication date: April 5, 2018
    Inventors: Ki Hong LEE, Ji Yeon BAEK, Seung Ho PYI
  • Publication number: 20180039357
    Abstract: An apparatus for sensing a touch pressure includes: a substrate; a touch sensor provided on one surface of the substrate; a first pressure sensing electrode provided on the other surface opposite to the one surface of the substrate; a protective layer provided on the first pressure sensing electrode, the protective layer including a first opening area through which a portion of the first pressure sensing electrode is exposed; a flexible circuit board electrically connecting the touch sensor and the first pressure sensing electrode to each other; and a conductive member disposed in the first opening area, the conductive member electrically connecting the first pressure sensing electrode and the flexible circuit board to each other.
    Type: Application
    Filed: August 2, 2017
    Publication date: February 8, 2018
    Inventors: Ji Yeon BAEK, Ji Yun BANG, Seung Min LEE, Jang Hwang JEON, Chang Sub JUNG