Abstract: Disclosed is an operating method of a memory system that includes a plurality of memory blocks, the operating method including a first step of copying, in order to recover sudden power-off of the memory system, data of an open block to a selected block among the plurality of memory blocks while maintaining map data associated with the open block and open block identification information; a second step of erasing the open block; and a third step of copying the data, which is copied to the selected block, to the erased open block.

Abstract: A memory system includes a memory device including memory blocks, and a controller configured to in response to a program request or a read request for a selected memory block among the memory blocks being received from a host, store first data to which a first logical address is allocated in a cache group, generate a first entry for the first data stored in the cache group, and in response to second data to which the first logical address is allocated being stored in the cache group after the first data is stored in the cache group, generate a second entry for the second data.

Abstract: The present technology relates to an electronic device. The storage device according to the present technology may include a memory device and a memory controller. The memory device may include a plurality of memory blocks. The memory controller may control the memory device to perform a recovery operation for a first sudden power off on a target block on which a program operation is stopped due to the first sudden power off among the plurality of memory blocks, and perform a program operation of storing lock data including information indicating completion of the recovery operation for the first sudden power off in a page next to a page on which the recovery operation is completed in the target block.

Abstract: A method of operating a controller that controls an operation of a semiconductor memory device including a meta area, a normal area, and a state area, includes sensing a turn-on of a memory system including the controller, checking a last state flag among at least one or more state flags stored in the state area, and determining whether to perform a reclaim operation on meta data stored in the meta area based on the checked state flag.

Abstract: Disclosed is an operating method of a memory system that includes a plurality of memory blocks, the operating method including a first step of copying, in order to recover sudden power-off of the memory system, data of an open block to a selected block among the plurality of memory blocks while maintaining map data associated with the open block and open block identification information; a second step of erasing the open block; and a third step of copying the data, which is copied to the selected block, to the erased open block.

Abstract: A memory system includes a memory device including memory blocks, and a controller configured to in response to a program request or a read request for a selected memory block among the memory blocks being received from a host, store first data to which a first logical address is allocated in a cache group, generate a first entry for the first data stored in the cache group, and in response to second data to which the first logical address is allocated being stored in the cache group after the first data is stored in the cache group, generate a second entry for the second data.

Abstract: Embodiments of the disclosed technology relate to a memory system, and a memory controller and a method of operating the same. In performing a recovery operation after occurrence of sudden power off (SPO), by determining whether to delete, from a memory device, journaling information associated with data stored in a target open memory block based on the state of the memory device, thereby preventing unnecessary data movement in a situation where the number of free memory blocks included in the memory device is insufficient, and maintaining the number of free memory blocks included in the memory device to a predetermined value or more.

Abstract: The present technology relates to an electronic device. The storage device according to the present technology may include a memory device and a memory controller. The memory device may include a plurality of memory blocks. The memory controller may control the memory device to perform a recovery operation for a first sudden power off on a target block on which a program operation is stopped due to the first sudden power off among the plurality of memory blocks, and perform a program operation of storing lock data including information indicating completion of the recovery operation for the first sudden power off in a page next to a page on which the recovery operation is completed in the target block.

Abstract: A method of operating a controller that controls an operation of a semiconductor memory device including a meta area, a normal area, and a state area, includes sensing a turn-on of a memory system including the controller, checking a last state flag among at least one or more state flags stored in the state area, and determining whether to perform a reclaim operation on meta data stored in the meta area based on the last state flag.

Abstract: Embodiments of the disclosed technology relate to a memory system, and a memory controller and a method of operating the same. In performing a recovery operation after occurrence of sudden power off (SPO), by determining whether to delete, from a memory device, journaling information associated with data stored in a target open memory block based on the state of the memory device, thereby preventing unnecessary data movement in a situation where the number of free memory blocks included in the memory device is insufficient, and maintaining the number of free memory blocks included in the memory device to a predetermined value or more.

Abstract: A memory system and an operating method thereof are provided. The memory system includes a buffer memory storing a plurality of meta-slices constituting meta-data, and a memory controller marking meta-slices being updated, among the plurality of meta-slices stored in the buffer memory, as dirty meta-slices, generating journal data including update information corresponding to the dirty meta-slices, and flushing the journal data together with one of the dirty meta-slices to a non-volatile memory device.

Abstract: A memory system and an operating method thereof are provided. The memory system includes a buffer memory storing a plurality of meta-slices constituting meta-data, and a memory controller marking meta-slices being updated, among the plurality of meta-slices stored in the buffer memory, as dirty meta-slices, generating journal data including update information corresponding to the dirty meta-slices, and flushing the journal data together with one of the dirty meta-slices to a non-volatile memory device.

Abstract: Disclosed is a memory controller, including: a host interface suitable for queuing a plurality of host commands from a host in a host command queue; a state register storing ready set bits respectively corresponding to the plurality of host commands; a memory command generating unit generating and queuing memory commands and state update information corresponding to the queued host commands in a memory command queue, respectively; and the memory command performing unit performing an operation in response to the queued memory commands. The memory command performing unit obtains state update information corresponding to the performed memory command from the memory command queue, and updates a ready set bit of a host command corresponding to the performed memory command based on the obtained state update information.

Abstract: Disclosed is a memory controller, including: a host interface suitable for queueing a plurality of host commands from a host in a host command queue; a state register suitable for storing ready set bits respectively corresponding to the plurality of host commands; a memory command generating unit suitable for generating and queueing memory commands and state update information corresponding to the queued host commands in a memory command queue, respectively; and the memory command performing unit suitable for performing an operation in response to the queued memory commands. The memory command performing unit obtains state update information corresponding to the performed memory command from the memory command queue, and updates a ready set bit of a host command corresponding to the performed memory command based on the obtained state update information.