Patents by Inventor Ji Yong UM

Ji Yong UM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9843256
    Abstract: An internal voltage generation circuit includes a comparison block suitable for generating a comparison signal by comparing an internal voltage with a reference voltage; and an internal voltage generation circuit suitable for controlling an amount of an internal current in response to a bias voltage corresponding to an operation current of the comparison block, and generating the internal voltage corresponding to the internal current in response to the comparison signal.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 12, 2017
    Assignee: SK Hynix Inc.
    Inventor: Ji-Yong Um
  • Publication number: 20170003703
    Abstract: An internal voltage generation circuit includes a comparison block suitable for generating a comparison signal by comparing an internal voltage with a reference voltage; and an internal voltage generation circuit suitable for controlling an amount of an internal current in response to a bias voltage corresponding to an operation current of the comparison block, and generating the internal voltage corresponding to the internal current in response to the comparison signal.
    Type: Application
    Filed: December 2, 2015
    Publication date: January 5, 2017
    Inventor: Ji-Yong UM
  • Publication number: 20130077445
    Abstract: An analog beamformer of an ultrasonic diagnosis apparatus includes: a plurality of unit analog beamformers allocated to two or more focal points, respectively, and configured to beamform signals received from the respective focal points through transducer elements and output the beamformed signals; an analog multiplexer configured to sequentially select the output signals of the unit analog beamformers and generate a final output signal; a clock generator configured to provide a clock signal required for the unit analog beamformers; and a processor configured to provide information on sampling time points of channels, and sequentially operate the unit analog beamformers to perform beamforming according to a time-interleaving scheme.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 28, 2013
    Applicant: POSTECH ACADEMY- INDUSTRY FOUNDATION
    Inventors: Ji Yong UM, Hong June PARK, Jae Hwan KIM