Abstract: A chip for analyzing fluid being moved without an outside power source includes: a pre-treatment portion into which fluid of a target-being analyzed substance is injected and mixed with an identification substance; a channel portion in which a specific reaction of the fluid such as an antigen-antibody reaction is conducted; and a washing portion into which the fluid is received. The pre-treatment portion includes: a specimen injection portion into which the fluid is injected; a first buffer portion protruding upwardly with respect to the specimen injection portion connected thereto to have a height greater than that of the specimen injection portion relative to the channel portion, such that the fluid is firstly received in the first buffer portion; and at least one specimen leading guide which destroys surface tension of the fluid flow moving from the specimen injection portion to the first buffer portion.

Abstract: A method of manufacturing a display substrate includes forming a gate insulation layer on the base substrate on which a gate metal pattern, forming a data metal pattern on the gate insulation layer, sequentially forming a insulation layer and an organic layer on the base substrate on which the data metal pattern is formed, partially exposing the organic layer, developing the organic layer to partially remove the organic layer on the data metal pattern and to expose at least a portion of the protecting layer on the gate metal pattern, forming a common electrode on the organic layer, forming a pixel electrode on the on the organic layer, and forming an insulation layer between the pixel electrode and the common electrode. An etching degree of a data metal may be controlled by controlling a thickness of a remained organic layer to reduce a damage of the data metal.

Abstract: A method of obtaining elasticity information of a region of interest (ROI) includes obtaining a first elasticity information of an object by using a shear wave induced to the object, setting an internal ROI of the object, based on the first elasticity information, obtaining a second elasticity information of the ROI by using a shear wave induced to the ROI, and obtaining a third elasticity information of the ROI by using the first and second elasticity information.

Abstract: There are provided a device for providing haptic feedback based on user gesture recognition and a method of operating the same. The device includes a detection unit configured to detect a gesture performed by a user, a recognition unit configured to process detection information in which the user's gesture is detected by the detection unit and recognize a specific gesture performed by the user, and a control unit configured to determine whether haptic feedback information is output in consideration of the user's specific gesture recognized by the recognition unit, deliver the haptic feedback information output according to the determination result to at least one external device of a mobile terminal and a speaker, and provide haptic feedback to the user.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body having a plurality of dielectric layers and having first and second end surfaces opposing each other; a first internal electrode formed on each of the dielectric layers, including a first insulating part exposed to the second end surface, and exposed to the first end surface; a second internal electrode disposed to face the first internal electrode, having the dielectric layer interposed therebetween, and exposed to the first and second end surfaces; and a second insulating part formed on an edge of the second internal electrode exposed to the first end surface.

Abstract: Exemplary embodiments of the present invention disclose a non-halogenated etchant for etching an indium oxide layer and a method of manufacturing a display substrate using the non-halogenated etchant, the non-halogenated etchant including nitric acid, sulfuric acid, a corrosion inhibitor including ammonium, a cyclic amine-based compound, and water.

Abstract: A method of providing an ultrasound elastography image that includes inducing a shear wave by transmitting a first ultrasound signal pushing an object to the object, transmitting a second ultrasound signal tracing the shear wave to the object to receive a response signal to the second ultrasound signal from the object; acquiring an elastography image of the object, based on the response signal, and providing the elastography image of the object and transmission position information of the first ultrasound signal.

Abstract: An elasticity information providing method performed by an ultrasound apparatus includes acquiring an elastography image of an object, detecting a region corresponding to a predetermined elastic modulus in the elastography image, and providing information about the region that is detected along with the elastography image.

Abstract: There is provided a dielectric composition including: a base powder including BaTiO3; a first accessory component including a content (x1) of 0.1 to 1.0 at % of an oxide or a carbonate including transition metals, based on 100 moles of the base powder; a second accessory component including a content (y) of 0.01 to 3.0 at % of oxide or carbonate including a fixed valence acceptor element, based on 100 moles of the base powder; a third accessory component including an oxide or a carbonate including a Ce element (content of z at %) and at least one rare earth element (content of w at %); and a fourth accessory component including a sintering aid, wherein 0.01?z?x1+4y and 0.01?z+w?x1+4y based on 100 moles of the base powder.

Abstract: A laundry machine having a steam generator is disclosed. An embodiment of a laundry machine comprises a drum, a steam generator, and a controller. The steam generator may include a heat-variable heater. The heater may be operated in one setting among a plurality of heat settings.

Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.

Abstract: A thin film transistor array panel includes a substrate, gate lines, each including a gate pad, a gate insulating layer, data lines, each including a data pad connected to a source and drain electrode, a first passivation layer disposed on the data lines and the drain electrode, a first electric field generating electrode, a second passivation layer disposed on the first electric field generating electrode, and a second electric field generating electrode. The gate insulating layer and the first and second passivation layers include a first contact hole exposing a part of the gate pad, the first and second passivation layers include a second contact hole exposing a part of the data pad, and at least one of the first and second contact holes have a positive taper structure having a wider area at an upper side than at a lower side.

Abstract: A method of manufacturing a thin film transistor array substrate includes providing a plurality of gate lines and a plurality of data lines on a first substrate, providing an organic layer on the gate lines and the data lines, providing a first electrode on the organic layer, providing a passivation layer on the first electrode, providing a second electrode on the passivation layer, providing a first cover layer on the second electrode to cover the second electrode, providing a plurality of photosensitive layer patterns on the first cover layer, providing a plurality of first cutout patterns in the first cover layer and a plurality of second cutout patterns in the second electrode using the photosensitive layer patterns as an etch mask, and providing a plurality of third cutout patterns in the passivation layer using the first cover layer as an etch mask.

Abstract: A method of fabricating a display device includes forming a thin-film transistor including a gate electrode, a source electrode and a drain electrode on a substrate, forming a first insulating layer and a second insulating layer on the thin-film transistor, forming a common electrode on the second insulating layer by depositing a common electrode material on the second insulating layer, plasma-treating a photoresist pattern on the common electrode material, and etching the common electrode material using the plasma-treated photoresist pattern as a mask, defining a contact hole in the second insulating layer which corresponds to the drain electrode using the plasma-treated photoresist pattern and the common electrode as a mask, forming a third insulating layer on the second insulating layer and the common electrode to expose the contact hole and the drain electrode and forming a pixel electrode connected to the drain electrode on the third insulating layer.

Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.

Abstract: A method of manufacturing a thin film transistor array substrate includes providing a plurality of gate lines and a plurality of data lines on a first substrate, providing an organic layer on the gate lines and the data lines, providing a first electrode on the organic layer, providing a passivation layer on the first electrode, providing a second electrode on the passivation layer, providing a first cover layer on the second electrode to cover the second electrode, providing a plurality of photosensitive layer patterns on the first cover layer, providing a plurality of first cutout patterns in the first cover layer and a plurality of second cutout patterns in the second electrode using the photosensitive layer patterns as an etch mask, and providing a plurality of third cutout patterns in the passivation layer using the first cover layer as an etch mask.

Abstract: Provided are a novel compound having skin-whitening, anti-oxidizing and PPAR activities and a medical use thereof, and the compound has skin-whitening activities for the suppression of tyrosinase, and accordingly, is useful for use in skin-whitening pharmaceutical composition or cosmetic products; has anti-oxidant activities, and accordingly, is useful for the prevention and treatment of skin-aging; and has PPAR activities, and in particular, PPAR? and PPAR? activities, and accordingly, is useful for use in pharmaceutical compositions or health foods which are effective for the prevention and treatment of obesity, metabolic disease, or cardiovascular disease.

Abstract: A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; external electrodes covering end portions of the ceramic body in length direction; an active layer in which the internal electrodes are disposed in opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in thickness direction, the lower cover layer thicker than the upper cover layer.

Abstract: Provided is a fluid analysis cartridge that performs a test on a fluid sample. The fluid analysis cartridge includes: a testing part configured to receive a fluid sample and configured to perform a test on the fluid sample; a housing including at least one supply hole configured to supply the fluid sample to the testing part; a filtering part that is disposed between the at least one supply hole and the testing part and is configured to filter a particular material included in the fluid sample; and at least one stepped part provided on a surface of the housing facing the filtering part and that forms a gap between the filtering part and the surface of the housing.

Abstract: A thin film transistor array panel includes a substrate; a gate line located over the substrate and including a gate pad portion; a data line located over the gate line and including a source electrode and a data pad portion; a drain electrode; a first passivation layer located over the data line and the drain electrode; an organic insulating layer located over the first passivation layer and having a contact hole; a first field generating electrode located over the organic insulating layer and having an opening; a second passivation layer located over the first field generating electrode; and a second field generating electrode located over the second passivation layer. The contact hole coincides with or is smaller than the opening, and the contact hole has a tapered structure.