Patents by Inventor Jia Bin Chen

Jia Bin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7536810
    Abstract: A shoe includes a shoe sole having one or more slots to detachably attach a cleat member which may be attached to cycle pedal. A plate is selectively attached to the shoe sole and has an opening to receive the cleat member, and to allow the cleat member to extend out of the plate, and to be attached to the cycle pedal. The plate includes one or more bulges or pegs to engage into the shoe sole and to anchor the plate to the shoe sole. One or more cleat elements may be detachably attached to the shoe sole, and partially received in depressions of the shoe sole, to anchor the cleat element to the shoe sole.
    Type: Grant
    Filed: January 15, 2007
    Date of Patent: May 26, 2009
    Inventors: Guo Jr Jau, Jia Bin Chen
  • Publication number: 20060094224
    Abstract: A bumping process is provided. The bumping process comprises the steps of: firstly, providing a wafer; next forming an under bump metallurgy (UBM) on the active surface of the wafer; then, forming a photo-resist layer on the active surface of the wafer and forming at least an opening in the photo-resist layer; then, sequentially forming a copper post, a barrier and a copper layer; then removing the photo-resist layer; finally reflowing the solder layer in the opening. The barrier layer is made of the materials such as nickel, lest the copper post and the solder layer might contact directly, causing the copper to diffuse fast and lose accordingly. Therefore, the quality of bumping process and structure can be enhanced according to the present invention.
    Type: Application
    Filed: October 18, 2005
    Publication date: May 4, 2006
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Min-Lung Huang, Yi-Hsin Chen, Jia-Bin Chen
  • Publication number: 20060094226
    Abstract: A bumping process is provided as following: at first, providing a wafer, then forming a first photo-resist layer on a active surface of the wafer and forming at least a first opening on the first photo-resist layer; and forming a copper pillar in the first opening; then forming a second photo-resist layer on the first photo-resist layer and forming at least a second opening on the second photo-resist layer; finally forming a solder layer in the second opening to attach the solder layer on the copper pillar, and removing the first and second photo-resist layer.
    Type: Application
    Filed: September 20, 2005
    Publication date: May 4, 2006
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Min-Lung Huang, Yi-Hsin Chen, Jia-Bin Chen
  • Publication number: 20060087034
    Abstract: A bumping process includes the steps of: firstly, providing a wafer; forming a first photo-resist layer on a active surface of the wafer and forming at least a first opening on the first photo-resist layer; next, forming a first copper pillar in the first opening; next, forming a second photo-resist layer on the first photo-resist layer and forming at least a second opening on the second photo-resist layer, wherein the second opening smaller than the first opening so that a portion of the surface of the first copper pillar is exposed in the second opening; then, forming a second copper pillar in the second opening; finally, forming a solder layer on the second copper pillar; and removing the first and second photo-resist layers.
    Type: Application
    Filed: September 27, 2005
    Publication date: April 27, 2006
    Inventors: Min-Lung Huang, Yi-Hsin Chen, Jia-Bin Chen
  • Publication number: 20060088992
    Abstract: A bumping process is provided as following: at first, providing a wafer, then forming a first photo-resist layer on a active surface of the wafer and forming at least a first opening on the first photo-resist layer; and forming a first copper pillar in the first opening; then forming a second photo-resist layer on the first photo-resist layer and forming at least a second opening on the second photo-resist layer, wherein the second opening is bigger than the first opening so that the first copper pillar and the surrounding first photo-resist layer are exposed in the second opening; and forming a second copper pillar in the second opening; finally forming a solder layer onto the second pillar, and removing the first and second photo-resist layers.
    Type: Application
    Filed: September 20, 2005
    Publication date: April 27, 2006
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Min-Lung Huang, Yi-Hsin Chen, Jia-Bin Chen