Patents by Inventor Jia-En Lee

Jia-En Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240029401
    Abstract: Disclosed are an image detection auxiliary system and an image detection method. An image capture device is used to generate an original image. A computing device receives the original image and preprocesses the original image as an input image. The computing device uses a classification model to obtain a feature parameter corresponding to the input image, and inputs the feature parameter to a probability function to calculate an image focus score. Finally, the computing device performs formal detection or subsequent processing of generating a second warning signal according to the image focus score.
    Type: Application
    Filed: November 30, 2022
    Publication date: January 25, 2024
    Inventors: Yun-Jhih CHIN, Shu-Chiao LIAO, Jia-En LEE
  • Publication number: 20230408987
    Abstract: The disclosure provides an artificial intelligence model control system, including a plurality of artificial intelligence model service modules, a plurality of model plugins, and a model controller. Each model plugin corresponds to one artificial intelligence model service module, so that the model plugin communicates with the corresponding artificial intelligence model service module. The model controller is connected to the model plugins and controls, through the model plugin, the corresponding artificial intelligence model service module to perform a task. Therefore, in the disclosure, a single model controller controls all artificial intelligence model service modules to perform tasks.
    Type: Application
    Filed: November 16, 2022
    Publication date: December 21, 2023
    Inventors: Jia-En Lee, Shu-Chiao Liao
  • Publication number: 20220139828
    Abstract: Methods to form vertically conducting and laterally conducting low-cost resistor structures utilizing dual-resistivity conductive materials are provided. The dual-resistivity conductive materials are deposited in openings in a dielectric layer using a single deposition process step. A high-resistivity ?-phase of tungsten is stabilized by pre-treating portions of the dielectric material with impurities. The portions of the dielectric material in which impurities are incorporated encompass regions laterally adjacent to where high-resistivity ?-W is desired. During a subsequent tungsten deposition step the impurities may out-diffuse and get incorporated in the tungsten, thereby stabilizing the metal in the high-resistivity ?-W phase. The ?-W converts to a low-resistivity ?-phase of tungsten in the regions not pre-treated with impurities.
    Type: Application
    Filed: January 17, 2022
    Publication date: May 5, 2022
    Inventors: Jia-En Lee, Po-Yu Huang, Shih-Che Lin, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang
  • Patent number: 11227830
    Abstract: Methods to form vertically conducting and laterally conducting low-cost resistor structures utilizing dual-resistivity conductive materials are provided. The dual-resistivity conductive materials are deposited in openings in a dielectric layer using a single deposition process step. A high-resistivity ?-phase of tungsten is stabilized by pre-treating portions of the dielectric material with impurities. The portions of the dielectric material in which impurities are incorporated encompass regions laterally adjacent to where high-resistivity ?-W is desired. During a subsequent tungsten deposition step the impurities may out-diffuse and get incorporated in the tungsten, thereby stabilizing the metal in the high-resistivity ?-W phase. The ?-W converts to a low-resistivity ?-phase of tungsten in the regions not pre-treated with impurities.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: January 18, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia-En Lee, Po-Yu Huang, Shih-Che Lin, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang
  • Publication number: 20200135641
    Abstract: Methods to form vertically conducting and laterally conducting low-cost resistor structures utilizing dual-resistivity conductive materials are provided. The dual-resistivity conductive materials are deposited in openings in a dielectric layer using a single deposition process step. A high-resistivity ?-phase of tungsten is stabilized by pre-treating portions of the dielectric material with impurities. The portions of the dielectric material in which impurities are incorporated encompass regions laterally adjacent to where high-resistivity ?-W is desired. During a subsequent tungsten deposition step the impurities may out-diffuse and get incorporated in the tungsten, thereby stabilizing the metal in the high-resistivity ?-W phase. The ?-W converts to a low-resistivity ?-phase of tungsten in the regions not pre-treated with impurities.
    Type: Application
    Filed: August 5, 2019
    Publication date: April 30, 2020
    Inventors: Jia-En Lee, Po-Yu Huang, Shih-Che Lin, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang