Patents by Inventor Jia-Hao Chang

Jia-Hao Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113199
    Abstract: A method of manufacturing a semiconductor device includes forming a gate electrode structure over a channel region, wherein the gate electrode structure includes a gate dielectric layer disposed over the first channel region, a gate electrode disposed over the gate dielectric layer, and insulating spacers disposed over opposing sidewalls of the gate electrode, wherein the gate dielectric layer is disposed over opposing sidewalls of the gate electrode. An interlayer dielectric layer is formed over opposing sidewalls of the insulating spacers. The insulating spacers are removed from an upper portion of the opposing sidewalls of the gate electrode to form trenches between the opposing sidewalls of the upper portion of the gate electrode and the interlayer dielectric layer, and the trenches are filled with an insulating material.
    Type: Application
    Filed: February 7, 2023
    Publication date: April 4, 2024
    Inventors: Jia-Chuan YOU, Chia-Hao Chang, Kuo-Cheng Chiang, Chin-Hao Wang
  • Publication number: 20240096961
    Abstract: A contact stack of a semiconductor device includes a source/drain feature, a silicide layer wrapping around the source/drain feature, a seed metal layer in direct contact with the silicide layer, and a conductor in contact with the seed metal layer. The contact stack excludes a metal nitride layer in direct contact with the silicide layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Shih-Chuan CHIU, Tien-Lu LIN, Yu-Ming LIN, Chia-Hao CHANG, Chih-Hao WANG, Jia-Chuan YOU
  • Patent number: 11916072
    Abstract: A semiconductor device according to the present disclosure includes a first gate structure and a second gate structure aligned along a direction, a first metal layer disposed over the first gate structure, a second metal layer disposed over the second gate structure, and a gate isolation structure extending between the first gate structure and the second gate structure as well as between the first metal layer and the second metal layer.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jia-Chuan You, Chia-Hao Chang, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
  • Publication number: 20070235221
    Abstract: The present invention is a metal shielding apparatus; it includes a cover shielding and a bottom shielding. The cover shielding has a number of holes while the bottom shielding has a number of jutted points. The holes and the jutted points can be used for alignment when combining these two covers. And there is at least one raised part among the jutted points for a better fitting of the cover and bottom shieldings and further prevents from the looseness. Furthermore, the holes, jutted points and raised parts can also be setup on the cover and the bottom shieldings interchangeably for the same effect.
    Type: Application
    Filed: September 26, 2006
    Publication date: October 11, 2007
    Inventor: Jia-Hao Chang