Patents by Inventor Jia-Hong Ye
Jia-Hong Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11467458Abstract: A circuit substrate includes a substrate, an active device, a first signal line, a second signal line, a shielding electrode, a data line, a pixel electrode, and a common electrode. The first signal line is electrically connected to the active device, and includes a main portion and a connection portion connected to the main portion. The main portion extends along a first direction. The second signal line extends along a second direction. The second signal line is electrically connected to the connection portion. The shielding electrode overlaps the connection portion in a normal direction of the substrate. The shielding electrode and the second signal line belong to a same conductive layer. The data line is electrically connected to the active device. The common electrode is electrically connected to the shielding electrode.Type: GrantFiled: October 20, 2021Date of Patent: October 11, 2022Assignee: AU OPTRONICS CORPORATIONInventors: Jia-Hong Ye, Kuo-Yu Huang
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Patent number: 11362216Abstract: An active device substrate includes a substrate, a first active device, and a second active device. The first active device includes a first gate, a crystallized metal oxide layer, a first insulation layer, a first source, and a first drain. The crystallized metal oxide layer is located on the first gate. The first insulation layer is sandwiched between the crystallized metal oxide layer and the first gate. An area from the top surface of the crystallized metal oxide layer to the bottom surface of the crystallized metal oxide layer is observed via a selected area diffraction mode of a transmission electron microscope, and a diffraction pattern of a crystallized phase can be observed. The second active device includes a second gate, a silicon semiconductor layer, a second source, and a second drain. A manufacturing method of an active device substrate is further provided.Type: GrantFiled: September 30, 2020Date of Patent: June 14, 2022Assignee: Au Optronics CorporationInventor: Jia-Hong Ye
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Publication number: 20210343526Abstract: A manufacturing method of a crystallized metal oxide layer includes: providing a substrate; forming a first insulation layer on the substrate; forming a first metal oxide layer on the first insulation layer; forming a second metal oxide layer on the first insulation layer; forming a second insulation layer on the first metal oxide layer and the second metal oxide layer; forming a silicon layer on the second insulation layer; performing a first laser process on a portion of the silicon layer covering the first metal oxide layer; and performing a second laser process on a portion of the silicon layer covering the second metal oxide layer. An active device and a manufacturing method thereof are also provided.Type: ApplicationFiled: July 14, 2021Publication date: November 4, 2021Applicant: Au Optronics CorporationInventors: Jia-Hong Ye, Ching-Liang Huang
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Patent number: 11134346Abstract: A backlight module and display device using the same are provided. The backlight module has a light guide plate. A piezoelectric module is arranged at the outer side of the backside surface of the light guide plate and configured to produce a vibration. The vibration is directly or indirectly transmitted to a resonator, for example, a light guide plate or a bezel, to produce resonance, and a space to which the backside surface is oriented is used as a resonance cavity. By means of the arrangement, the screen-to-body ratio of electronic products and the sound quality can be improved while taking into account the thickness and volume of the electronic products.Type: GrantFiled: August 12, 2020Date of Patent: September 28, 2021Assignee: AU OPTRONICS CORPORATIONInventors: Jia-Hong Ye, Cheng-Syun Sie
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Patent number: 11094540Abstract: A manufacturing method of a crystallized metal oxide layer includes: providing a substrate; forming a first insulation layer on the substrate; forming a first metal oxide layer on the first insulation layer; forming a second metal oxide layer on the first insulation layer; forming a second insulation layer on the first metal oxide layer and the second metal oxide layer; forming a silicon layer on the second insulation layer; performing a first laser process on a portion of the silicon layer covering the first metal oxide layer; and performing a second laser process on a portion of the silicon layer covering the second metal oxide layer. An active device and a manufacturing method thereof are also provided.Type: GrantFiled: March 29, 2019Date of Patent: August 17, 2021Assignee: Au Optronics CorporationInventors: Jia-Hong Ye, Ching-Liang Huang
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Patent number: 10969618Abstract: An opposite substrate including a substrate, first light-shielding patterns, second light-shielding patterns, a planarization layer and support members is provided. The support members are located in primary support regions and secondary support regions of the opposite substrate. The first light-shielding patterns respectively extend along a first direction, and a material of the first light-shielding patterns includes an organic material. The second light-shielding patterns respectively extend along a second direction, and a material of the second light-shielding patterns includes metal. The first light-shielding patterns and the second light-shielding patterns are respectively located at opposite sides of the planarization layer. Alternatively, the first light-shielding patterns and the second light-shielding patterns are located at the same side of the planarization layer, and the planarization layer has openings respectively overlapped with the support members located in the secondary support regions.Type: GrantFiled: April 23, 2020Date of Patent: April 6, 2021Assignee: Au Optronics CorporationInventors: Ssu-Hui Lu, Jia-Hong Ye, Kuo-Yu Huang
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Publication number: 20210058711Abstract: A backlight module and display device using the same are provided. The backlight module has a light guide plate. A piezoelectric module is arranged at the outer side of the backside surface of the light guide plate and configured to produce a vibration. The vibration is directly or indirectly transmitted to a resonator, for example, a light guide plate or a bezel, to produce resonance, and a space to which the backside surface is oriented is used as a resonance cavity. By means of the arrangement, the screen-to-body ratio of electronic products and the sound quality can be improved while taking into account the thickness and volume of the electronic products.Type: ApplicationFiled: August 12, 2020Publication date: February 25, 2021Inventors: Jia-Hong YE, Cheng-Syun SIE
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Publication number: 20210013344Abstract: An active device substrate includes a substrate, a first active device, and a second active device. The first active device includes a first gate, a crystallized metal oxide layer, a first insulation layer, a first source, and a first drain. The crystallized metal oxide layer is located on the first gate. The first insulation layer is sandwiched between the crystallized metal oxide layer and the first gate. An area from the top surface of the crystallized metal oxide layer to the bottom surface of the crystallized metal oxide layer is observed via a selected area diffraction mode of a transmission electron microscope, and a diffraction pattern of a crystallized phase can be observed. The second active device includes a second gate, a silicon semiconductor layer, a second source, and a second drain. A manufacturing method of an active device substrate is further provided.Type: ApplicationFiled: September 30, 2020Publication date: January 14, 2021Applicant: Au Optronics CorporationInventor: Jia-Hong Ye
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Patent number: 10840380Abstract: An active device substrate includes a substrate, a first active device, and a second active device. The first active device includes a first gate, a crystallized metal oxide layer, a first insulation layer, a first source, and a first drain. The crystallized metal oxide layer is located on the first gate. The first insulation layer is sandwiched between the crystallized metal oxide layer and the first gate. An area from the top surface of the crystallized metal oxide layer to the bottom surface of the crystallized metal oxide layer is observed via a selected area diffraction mode of a transmission electron microscope, and a diffraction pattern of a crystallized phase can be observed. The second active device includes a second gate, a silicon semiconductor layer, a second source, and a second drain. A manufacturing method of an active device substrate is further provided.Type: GrantFiled: April 19, 2019Date of Patent: November 17, 2020Assignee: Au Optronics CorporationInventor: Jia-Hong Ye
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Patent number: 10714631Abstract: The present invention provides two methods for crystallizing a metal oxide semiconductor layer and a semiconductor structure. The first crystallization method is treating an amorphous metal oxide semiconductor layer including indium with oxygen at a pressure of about 550 mtorr to about 5000 mtorr and at a temperature of about 200° C. to about 750° C. The second crystallization method is, firstly, sequentially forming a first amorphous metal oxide semiconductor layer, an aluminum layer, and a second amorphous metal oxide semiconductor layer on a substrate, and, secondly, treating the first amorphous metal oxide semiconductor layer, the aluminum layer, and the second amorphous metal oxide semiconductor layer with an inert gas at a temperature of about 350° C. to about 650° C.Type: GrantFiled: September 19, 2019Date of Patent: July 14, 2020Assignee: AU OPTRONICS CORPORATIONInventor: Jia-Hong Ye
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Patent number: 10566357Abstract: The present invention provides a method for crystallizing a metal oxide semiconductor layer, a semiconductor structure, a method for manufacturing a semiconductor structure, an active array substrate, and an indium gallium zinc oxide crystal. The crystallization method includes the following steps: forming an amorphous metal oxide semiconductor layer on a substrate; forming an oxide layer on the amorphous metal oxide semiconductor layer; forming an amorphous silicon layer on the oxide layer; and irradiating the amorphous silicon layer by using a laser, so as to heat the amorphous silicon layer, where the heated amorphous silicon layer heats the amorphous metal oxide semiconductor layer, so that the amorphous metal oxide semiconductor layer is converted into a crystallized metal oxide semiconductor layer.Type: GrantFiled: December 11, 2017Date of Patent: February 18, 2020Assignee: AU OPTRONICS CORPORATIONInventors: Jia-Hong Ye, Ching-Liang Huang
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Publication number: 20200013895Abstract: The present invention provides two methods for crystallizing a metal oxide semiconductor layer and a semiconductor structure. The first crystallization method is treating an amorphous metal oxide semiconductor layer including indium with oxygen at a pressure of about 550 mtorr to about 5000 mtorr and at a temperature of about 200° C. to about 750° C. The second crystallization method is, firstly, sequentially forming a first amorphous metal oxide semiconductor layer, an aluminum layer, and a second amorphous metal oxide semiconductor layer on a substrate, and, secondly, treating the first amorphous metal oxide semiconductor layer, the aluminum layer, and the second amorphous metal oxide semiconductor layer with an inert gas at a temperature of about 350° C. to about 650° C.Type: ApplicationFiled: September 19, 2019Publication date: January 9, 2020Inventor: Jia-Hong Ye
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Publication number: 20190326440Abstract: An active device substrate includes a substrate, a first active device, and a second active device. The first active device includes a first gate, a crystallized metal oxide layer, a first insulation layer, a first source, and a first drain. The crystallized metal oxide layer is located on the first gate. The first insulation layer is sandwiched between the crystallized metal oxide layer and the first gate. An area from the top surface of the crystallized metal oxide layer to the bottom surface of the crystallized metal oxide layer is observed via a selected area diffraction mode of a transmission electron microscope, and a diffraction pattern of a crystallized phase can be observed. The second active device includes a second gate, a silicon semiconductor layer, a second source, and a second drain. A manufacturing method of an active device substrate is further provided.Type: ApplicationFiled: April 19, 2019Publication date: October 24, 2019Applicant: Au Optronics CorporationInventor: Jia-Hong Ye
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Patent number: 10446691Abstract: The present invention provides two methods for crystallizing a metal oxide semiconductor layer and a semiconductor structure. The first crystallization method is treating an amorphous metal oxide semiconductor layer including indium with oxygen at a pressure of about 550 mtorr to about 5000 mtorr and at a temperature of about 200° C. to about 750° C. The second crystallization method is, firstly, sequentially forming a first amorphous metal oxide semiconductor layer, an aluminum layer, and a second amorphous metal oxide semiconductor layer on a substrate, and, secondly, treating the first amorphous metal oxide semiconductor layer, the aluminum layer, and the second amorphous metal oxide semiconductor layer with an inert gas at a temperature of about 350° C. to about 650° C.Type: GrantFiled: June 28, 2017Date of Patent: October 15, 2019Assignee: AU OPTRONICS CORPORATIONInventor: Jia-Hong Ye
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Publication number: 20190304779Abstract: A manufacturing method of a crystallized metal oxide layer includes: providing a substrate; forming a first insulation layer on the substrate; forming a first metal oxide layer on the first insulation layer; forming a second metal oxide layer on the first insulation layer; forming a second insulation layer on the first metal oxide layer and the second metal oxide layer; forming a silicon layer on the second insulation layer; performing a first laser process on a portion of the silicon layer covering the first metal oxide layer; and performing a second laser process on a portion of the silicon layer covering the second metal oxide layer. An active device and a manufacturing method thereof are also provided.Type: ApplicationFiled: March 29, 2019Publication date: October 3, 2019Applicant: Au Optronics CorporationInventors: Jia-Hong Ye, Ching-Liang Huang
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Patent number: 10312206Abstract: An array substrate includes a device array, a bonding pad, and at least one support structure. The bonding pad is located in a bonding area and is electrically connected to the device array. A horizontal distance between the at least one support structure and the bonding pad is between 5 ?m and 1000 ?m.Type: GrantFiled: December 13, 2017Date of Patent: June 4, 2019Assignee: Au Optronics CorporationInventors: Jia-Hong Ye, Pin-Fan Wang
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Publication number: 20190081124Abstract: An array substrate includes a device array, a bonding pad, and at least one support structure. The bonding pad is located in a bonding area and is electrically connected to the device array. A horizontal distance between the at least one support structure and the bonding pad is between 5 ?m and 1000 ?m.Type: ApplicationFiled: December 13, 2017Publication date: March 14, 2019Applicant: Au Optronics CorporationInventors: Jia-Hong Ye, Pin-Fan Wang
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Patent number: 10007168Abstract: A liquid crystal lens including a first substrate, a first electrode disposed on the first substrate, a second electrode disposed on the first substrate, a first conductive pattern disposed on the first substrate, a second conductive pattern disposed on the first substrate, a second substrate disposed opposite to the first substrate, a common electrode disposed on the second substrate, and a liquid crystal layer located between the first substrate and the second substrate is provided. The first conductive pattern and the second conductive pattern are electrically connected between the first electrode and the second electrode. A resistivity of the first conductive pattern and a resistivity of the second conductive pattern are greater than a resistivity of the first electrode and a resistivity of the second electrode. At least a portion of the at least one second conductive pattern is disposed into the at least one first conductive pattern.Type: GrantFiled: February 14, 2017Date of Patent: June 26, 2018Assignee: AU OPTRONICS CORPORATIONInventors: Jia-Hong Ye, Hsueh-Fang Yeh
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Publication number: 20180166474Abstract: The present invention provides a method for crystallizing a metal oxide semiconductor layer, a semiconductor structure, a method for manufacturing a semiconductor structure, an active array substrate, and an indium gallium zinc oxide crystal. The crystallization method includes the following steps: forming an amorphous metal oxide semiconductor layer on a substrate; forming an oxide layer on the amorphous metal oxide semiconductor layer; forming an amorphous silicon layer on the oxide layer; and irradiating the amorphous silicon layer by using a laser, so as to heat the amorphous silicon layer, where the heated amorphous silicon layer heats the amorphous metal oxide semiconductor layer, so that the amorphous metal oxide semiconductor layer is converted into a crystallized metal oxide semiconductor layer.Type: ApplicationFiled: December 11, 2017Publication date: June 14, 2018Inventors: Jia-Hong YE, Ching-Liang HUANG
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Publication number: 20180006157Abstract: The present invention provides two methods for crystallizing a metal oxide semiconductor layer and a semiconductor structure. The first crystallization method is treating an amorphous metal oxide semiconductor layer including indium with oxygen at a pressure of about 550 mtorr to about 5000 mtorr and at a temperature of about 200° C. to about 750° C. The second crystallization method is, firstly, sequentially forming a first amorphous metal oxide semiconductor layer, an aluminum layer, and a second amorphous metal oxide semiconductor layer on a substrate, and, secondly, treating the first amorphous metal oxide semiconductor layer, the aluminum layer, and the second amorphous metal oxide semiconductor layer with an inert gas at a temperature of about 350° C. to about 650° C.Type: ApplicationFiled: June 28, 2017Publication date: January 4, 2018Inventor: Jia-Hong YE