Abstract: A delay line structure disposed on a substrate having a dielectric base layer formed with a via, a layout layer and a grounding layer with a grounding circuit, includes two parallel spiral delay lines having a first outer straight section, a first outer bent section, an inner spiral region, a second outer bent section and a second outer straight section. The inner spiral region bends reciprocally between the first and second outer straight sections to form several inner bent parts and several inner straight parts. A grounding guard trace is disposed among the first and second outer straight sections and the inner straight parts and is coupled electrically to the grounding circuit, wherein each of the first and second outer bent sections and the inner bent parts has a width smaller than each of the first and second outer straight sections and the inner straight parts.

Abstract: A delay line structure disposed on a substrate having a dielectric base layer formed with a via, a layout layer and a grounding layer with a grounding circuit, includes two parallel spiral delay lines having a first outer straight section, a first outer bent section, an inner spiral region, a second outer bent section and a second outer straight section. The inner spiral region bends reciprocally between the first and second outer straight sections to form several inner bent parts and several inner straight parts. A grounding guard trace is disposed among the first and second outer straight sections and the inner straight parts and is coupled electrically to the grounding circuit, wherein each of the first and second outer bent sections and the inner bent parts has a width smaller than each of the first and second outer straight sections and the inner straight parts.

Abstract: A delay line structure has a serpentine delay line pair, a first and second grounding guard trace and two third grounding guard traces. The delay line pair is located in a layout layer extending from an input to an output end, The first and second grounding guard traces are connected to the grounding circuit through respective vias and are located in the layout layer. The third grounding guard traces are respectively located in the layout layer by an upper and lower edge of the delay line pair and are connected to the grounding circuit through respective vias.