Patents by Inventor Jia Jie Xia

Jia Jie Xia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210362189
    Abstract: A piezoelectric micromachined ultrasonic transducer (PMUT) includes a substrate, a stopper, and a membrane, where the substrate and the stopper are composed of same single-crystalline material. The substrate has a cavity penetrating the substrate, and the stopper protrudes from a top surface of the substrate and surrounds the edge of the cavity. The membrane is disposed over the cavity and attached to the stopper.
    Type: Application
    Filed: May 21, 2020
    Publication date: November 25, 2021
    Inventors: RAKESH KUMAR, Jia Jie Xia, You Qian
  • Publication number: 20210159387
    Abstract: A MEMS structure may include a substrate, a first metal layer arranged over the substrate, an aluminum nitride layer at least partially arranged over the first metal layer and a second metal layer including one or more patterns arranged over the aluminum nitride layer. The first metal layer may include an electrode area configured for external electrical connection and one or more isolated areas configured to be electrically isolated from the electrode area and further configured to be electrically isolated from external electrical connection. Each pattern of the second metal layer may be arranged to at least partially overlap with one of the isolated area(s) of the first metal layer.
    Type: Application
    Filed: November 26, 2019
    Publication date: May 27, 2021
    Inventors: Bevita KALLUPALATHINKAL CHANDRAN, Jia Jie XIA, Tze Sheong NEOH
  • Publication number: 20210130162
    Abstract: In a non-limiting embodiment, a MEMS device may include a substrate having a device stopper. The device stopper may be integral to the substrate and formed of the substrate material. A thermal dielectric isolation layer may be arranged over the device stopper and the substrate. A device cavity may extend through the substrate and the thermal dielectric isolation layer. The thermal dielectric isolation layer and the device stopper at least partially surround the device cavity. An active device layer may be arranged over the thermal dielectric isolation layer and the device cavity.
    Type: Application
    Filed: November 6, 2019
    Publication date: May 6, 2021
    Inventors: Ranganathan NAGARAJAN, Jia Jie XIA, Rakesh KUMAR, Bevita KALLUPALATHINKAL CHANDRAN
  • Publication number: 20210083169
    Abstract: A method of forming a piezoelectric microphone with an interlock/stopper and a micro-bump and a resulting device are provided. Embodiments include forming a membrane over a Si substrate having a first and second sacrificial layer disposed on opposite surfaces thereof, the membrane being formed on the first sacrificial layer, forming a first HM over the membrane, forming first and second vias through the first HM, forming a first pad layer in the first and second vias and over an exposed top thin film, forming a trench to the first sacrificial layer between the first and second vias and a gap between the trench and second via, patterning a second HM over the membrane, in the first and second vias, the trench and the gap, and forming a second pad layer over the second HM and in exposed areas around the first and second vias to form pad structures.
    Type: Application
    Filed: November 24, 2020
    Publication date: March 18, 2021
    Inventors: Jia Jie Xia, RAKESH KUMAR, Minu Prabhachandran NAIR, Nagarajan RANGANATHAN
  • Publication number: 20210050506
    Abstract: In a non-limiting embodiment, a device may include a substrate, and a hybrid active structure disposed over the substrate. The hybrid active structure may include an anchor region and a free region. The hybrid active structure may be connected to the substrate at least at the anchor region. The anchor region may include at least a segment of a piezoelectric stack portion. The piezoelectric stack portion may include a first electrode layer, a piezoelectric layer over the first electrode layer, and a second electrode layer over the piezoelectric layer. The free region may include at least a segment of a mechanical portion. The piezoelectric stack portion may overlap the mechanical portion at edges of the piezoelectric stack portion.
    Type: Application
    Filed: August 16, 2019
    Publication date: February 18, 2021
    Inventors: Jia Jie XIA, Ranganathan NAGARAJAN, Bevita KALLUPALATHINKAL CHANDRAN, Miles Jacob GEHM
  • Patent number: 10886455
    Abstract: A method of forming a piezoelectric microphone with an interlock/stopper and a micro-bump and a resulting device are provided. Embodiments include forming a membrane over a Si substrate having a first and second sacrificial layer disposed on opposite surfaces thereof, the membrane being formed on the first sacrificial layer, forming a first HM over the membrane, forming first and second vias through the first HM, forming a first pad layer in the first and second vias and over an exposed top thin film, forming a trench to the first sacrificial layer between the first and second vias and a gap between the trench and second via, patterning a second HM over the membrane, in the first and second vias, the trench and the gap, and forming a second pad layer over the second HM and in exposed areas around the first and second vias to form pad structures.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: January 5, 2021
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
    Inventors: Jia Jie Xia, Rakesh Kumar, Minu Prabhachandran Nair, Nagarajan Ranganathan
  • Patent number: 10490728
    Abstract: Microelectromechanical System (MEMS) devices and related fabrication methods. A piezoelectric stack is formed on a substrate and is separated from the substrate by a dielectric layer. The piezoelectric stack is formed that includes first and second piezoelectric layers with a first electrode below the first piezoelectric layer, as well as a contact pad and a second electrode between the first and second piezoelectric layers. A first contact is formed that extends through the piezoelectric layers and contact pad to the first electrode. A second contact is formed that extends through the second piezoelectric layer to the second electrode. The contact pad prevents an interface to form between the first and second piezoelectric layers in the contact opening, thus preventing corrosion of the piezoelectric layers during contact formation process.
    Type: Grant
    Filed: September 5, 2016
    Date of Patent: November 26, 2019
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Jia Jie Xia, Minu Prabhachandran Nair, Zouhair Sbiaa, Ramachandramurthy Pradeep Yelehanka, Rakesh Kumar
  • Publication number: 20190036003
    Abstract: A method of forming a piezoelectric microphone with an interlock/stopper and a micro-bump and a resulting device are provided. Embodiments include forming a membrane over a Si substrate having a first and second sacrificial layer disposed on opposite surfaces thereof, the membrane being formed on the first sacrificial layer, forming a first HM over the membrane, forming first and second vias through the first HM, forming a first pad layer in the first and second vias and over an exposed top thin film, forming a trench to the first sacrificial layer between the first and second vias and a gap between the trench and second via, patterning a second HM over the membrane, in the first and second vias, the trench and the gap, and forming a second pad layer over the second HM and in exposed areas around the first and second vias to form pad structures.
    Type: Application
    Filed: July 31, 2017
    Publication date: January 31, 2019
    Inventors: Jia Jie XIA, Rakesh KUMAR, Minu Prabhachandran NAIR, Nagarajan RANGANATHAN
  • Publication number: 20170301853
    Abstract: A Microelectromechanical System (MEMS) device which includes a piezoelectric stack on a substrate separated by a dielectric layer is disclosed. The piezoelectric stack includes first and second piezoelectric layers with a first electrode below the first piezoelectric layer and a contact pad and a second electrode between the first and second piezoelectric layers. A first contact extends through the piezoelectric layers and contact pad to the first electrode and a second contact extends through the second piezoelectric layer to the second electrode. The contact pad prevents an interface to form between the first and second piezoelectric layers in the contact opening, thus preventing corrosion of the piezoelectric layers during contact formation process.
    Type: Application
    Filed: September 5, 2016
    Publication date: October 19, 2017
    Inventors: Jia Jie XIA, Minu PRABHACHANDRAN NAIR, Zouhair SBIAA, Ramachandramurthy Pradeep YELEHANKA, Rakesh KUMAR
  • Publication number: 20170121172
    Abstract: Integrated MEMS-CMOS devices and integrated circuits with MEMS devices and CMOS devices are provided. An exemplary integrated MEMS-CMOS device is vertically integrated and includes a substrate having a first side and a second side opposite the first side. Further, the exemplary vertically integrated MEMS-CMOS device includes a CMOS device located in and/or over the first side of the substrate. Also, the exemplary vertically integrated MEMS-CMOS device includes a MEMS device located in and/or under the second side of the substrate.
    Type: Application
    Filed: January 13, 2017
    Publication date: May 4, 2017
    Inventors: Jia Jie Xia, Nagarajan Ranganathan, Rakesh Kumar, Aveek Nath Chatterjee
  • Patent number: 9550668
    Abstract: Integrated MEMS devices for pressure sensing and inertial sensing, methods for fabricating such integrated devices, and methods for fabricating vertically integrated MEMS pressure sensor/inertial sensor devices are provided. In an example, a method for fabricating an integrated device for pressure and inertial sensing includes forming a MEMS pressure sensor on a first side of a semiconductor substrate. The method further includes forming a MEMS inertial sensor on a second side of the semiconductor substrate. The second side of the semiconductor substrate is opposite the first side of the semiconductor substrate.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: January 24, 2017
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Jia Jie Xia, Nagarajan Ranganathan, Rakesh Kumar, Aveek Nath Chatterjee
  • Patent number: 9546090
    Abstract: Integrated MEMS-CMOS devices and methods for fabricating MEMS devices and CMOS devices are provided. An exemplary method for fabricating a MEMS device and a CMOS device includes forming the CMOS device in and/or over a first side of a semiconductor substrate. Further, the method includes forming the MEMS device in and/or under a second side of the semiconductor substrate. The second side of the semiconductor substrate is opposite the first side of the semiconductor substrate.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: January 17, 2017
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Jia Jie Xia, Nagarajan Ranganathan, Rakesh Kumar, Aveek Nath Chatterjee