Patents by Inventor Jia-Ming Yang

Jia-Ming Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230356035
    Abstract: A treadmill and an exercise accident detection method thereof are provided. The treadmill includes a treadmill body, an inertial sensor, and a processor. The inertial sensor is mounted on the treadmill body and continuously senses multiple sensed values while a treadmill belt of the treadmill is running. The processor is coupled to the inertial sensor, acquires multiple first sensed values sensed within a preset period by the inertial sensor, and analyzes the first sensed values sensed within the preset period to determine an event threshold value. The processor determines whether multiple second sensed values sensed not within the preset period by the inertial sensor satisfy a normal condition according to the event threshold value. If the second sensed values do not satisfy the normal condition, the processor controls the treadmill belt of the treadmill to stop running.
    Type: Application
    Filed: February 24, 2023
    Publication date: November 9, 2023
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Kun Chiu, Jia-Ming Yang, Chih-Chang Chen, Ban-Chwen Hsi, Yang-Ching Chang, Cheng-Yu Kao
  • Patent number: 7043598
    Abstract: In a memory device with a bank of N memory blocks, an address is generated for a first and a second one of the blocks. The first and second addresses include addresses for current first and second possible “refresh blocks”. If its memory block does not contend with the current first possible refresh block, an externally generated access to one of the N memory blocks is permitted and at least a portion of the refresh block is refreshed during a certain interval. In another aspect, the externally generated access is permitted and at least a portion of the current second possible refresh block is refreshed during the same certain interval if: i) the memory block of the externally generated access contends with the current first possible refresh block and ii) the current first and second possible refresh blocks are different ones of the N memory blocks.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: May 9, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuan-Yu Wu, Jia-Ming Yang, Chris Huang
  • Publication number: 20030126357
    Abstract: In a memory device with a bank of N memory blocks, an address is generated for a first and a second one of the blocks. The first and second addresses include addresses for current first and second possible “refresh blocks”. If its memory block does not contend with the current first possible refresh block, an externally generated access to one of the N memory blocks is permitted and at least a portion of the refresh block is refreshed during a certain interval. In another aspect, the externally generated access is permitted and at least a portion of the current second possible refresh block is refreshed during the same certain interval if: i) the memory block of the externally generated access contends with the current first possible refresh block and ii) the current first and second possible refresh blocks are different ones of the N memory blocks.
    Type: Application
    Filed: December 31, 2001
    Publication date: July 3, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chuan-Yu Wu, Jia-Ming Yang, Chris Huang