Abstract: A device and method for sensing environmental parameters of storage system is provided. A control unit and a temperature sensor are disposed in a sensor body. The temperature sensor and the capacitor electrode module are electrically connected with the control unit. The temperature sensor measures temperatures of the bulk solids and transmits the temperatures to the control unit. The capacitor electrode module measures capacitances of the bulk solids and transmits the capacitances to the control unit. The control unit gets a moisture content through variations of capacitance signals, and an ambient humidity is calculated through the moisture content and temperature signals.

Abstract: A liquid density sensor has a sensing module, a sensing rod and a floating device. The sensing module has a control circuit having computing functions. The sensing rod has a sensing line electrically connected to the control circuit. The floating device has a first magnetic unit and a floating ball mounted therein. The sensing rod is mounted through the floating device and the floating ball. The floating ball has a second magnetic unit. A specific gravity of the floating ball is lower than that of the floating device. The control circuit calculates a liquid density of liquid based on a distance between the first magnetic unit and the second magnetic unit according to a linear formula.

Abstract: Certain aspects of the present disclosure provide fully differential phase detectors for use in delay-locked loops, for example. One example phase detecting circuit generally includes a first input for a reference signal; a second input for an input signal to be compared with the reference signal; a set-reset (S-R) latch having a set input, a reset input, a first output, and a second output, and a delay (D) flip-flop having a logic input, a clock input, a reset input, and a logic output. The first input is connected with S-R reset input, the second input is connected with S-R set input, the first S-R output is connected with the D clock input, and the second S-R output is connected with the D reset input. The logic output of the D flip-flop indicates whether the input signal is leading or lagging the reference signal.

Abstract: A thermal mass flow meter includes a housing, a control module, a plurality of probes, a flow calculation circuit, and a heating module. The control module is installed in a containing space. The probes are connected to one terminal of the housing. The flow calculation circuit is connected to the control module, and has a plurality of circuit boards installed in the probes and a plurality of temperature sensing units connected to the circuit boards. The heating module is connected on one of the circuit boards, and connected to the control module. The control module controls the heating module to heat a working fluid in a pipeline; the flow calculation circuit senses the temperature inside the pipeline to acquire temperature change values, and transmits the temperature change values to the control module; and the control module measures the fluid velocity of the working fluid.

Abstract: A liquid density sensor has a sensing module, a sensing rod and a floating device. The sensing module has a control circuit having computing functions. The sensing rod has a sensing line electrically connected to the control circuit. The floating device has a first magnetic unit and a floating ball mounted therein. The sensing rod is mounted through the floating device and the floating ball. The floating ball has a second magnetic unit. A specific gravity of the floating ball is lower than that of the floating device. The control circuit calculates a liquid density of liquid based on a distance between the first magnetic unit and the second magnetic unit according to a linear formula.

Abstract: Certain aspects of the present disclosure provide fully differential phase detectors for use in delay-locked loops, for example. One example phase detecting circuit generally includes a first input for a reference signal; a second input for an input signal to be compared with the reference signal; a set-reset (S-R) latch having a set input, a reset input, a first output, and a second output, and a delay (D) flip-flop having a logic input, a clock input, a reset input, and a logic output. The first input is connected with S-R reset input, the second input is connected with S-R set input, the first S-R output is connected with the D clock input, and the second S-R output is connected with the D reset input. The logic output of the D flip-flop indicates whether the input signal is leading or lagging the reference signal.

Abstract: A phase locked loop (PLL) lock detector may be configured to observe the phase error signal from a phase comparator of a PLL circuit. The PLL lock detector may accumulate a sum of phase errors and compare the sum of phase errors to determine whether the PLL circuit is locked in phase with the reference signal. Various modifications to the phase error signal and sum of phase errors may be used to improve the efficiency of the PLL lock detector. Configurable settings for the accumulator and a comparator may be used to adjust the operation of the PLL lock detector.

Abstract: A hybrid Global Positioning System (GPS) receiving method, and associated GPS receiving apparatus is provided. The GPS receiving apparatus includes an RF front-end circuit, a correlation circuit, an acquisition engine and a bidirectional interface control unit. The RF front-end receiving circuit receives a satellite signal and converts the same into a baseband signal. The acquisition engine, coupled to the correlation circuit, determines reception power of the GPS satellite signal. The interface control unit, coupled to the acquisition engine, provides a low-speed interface for transmitting GPS intermediate data that includes a code bin, a frequency bin, navigation data, a local system time and a GPS time. The interface control unit includes a memory interface unit for coupling to a memory.

Abstract: A bit synchronization method and system for a GPS, which receives a satellite signal sent by a satellite to accordingly produce a synchronous signal. Each data bit of the satellite signal consists of N CA-codes. A data buffer receives and stores the data bits of the satellite signal. A matched filter filters the N CA-codes of each data bit in order to compute correlations of the N CA-codes of each data bit, and accordingly output a correlation set corresponding to the data bit, wherein the correlation set has N correlations. A selector selects one with the greatest value from the N correlations and uses the CA-code corresponding to the one with the greatest value as the synchronization signal.

Abstract: A hybrid Global Positioning System (GPS) receiving method, and associated GPS receiving apparatus is provided. The GPS receiving apparatus includes an RF front-end circuit, a correlation circuit, an acquisition engine and a bidirectional interface control unit. The RF front-end receiving circuit receives a satellite signal and converts the same into a baseband signal. The acquisition engine, coupled to the correlation circuit, determines reception power of the GPS satellite signal. The interface control unit, coupled to the acquisition engine, provides a low-speed interface for transmitting GPS intermediate data that includes a code bin, a frequency bin, navigation data, a local system time and a GPS time. The interface control unit includes a memory interface unit for coupling to a memory.

Abstract: A transmitter architecture and method of modulation that include a rotation-direction control circuit for varying the direction of rotation of phase transitions of a phase modulation based on the occurrence of a predetermined pattern of input data. This variation of rotation direction by the rotation-direction control circuit maintains the output spectrum of a modulated signal within the spectral mask requirements of an associated communications standard and thereby enables the use of non-linear power amplifiers in applications that generally require linear amplifiers.

Abstract: A bit synchronization method and system for a GPS, which receives a satellite signal sent by a satellite to accordingly produce a synchronous signal. Each data bit of the satellite signal consists of N CA-codes. A data buffer receives and stores the data bits of the satellite signal. A matched filter filters the N CA-codes of each data bit in order to compute correlations of the N CA-codes of each data bit, and accordingly output a correlation set corresponding to the data bit, wherein the correlation set has N correlations. A selector selects one with the greatest value from the N correlations and uses the CA-code corresponding to the one with the greatest value as the synchronization signal.