Abstract: A synchronization system for transform databases and a method thereof are provided. The system includes a database transformer and a data adapter. The database transformer is used to transform tables from a source database to a target database. The data adapter includes a statement parsing unit, a storage unit and a synchronization control unit. The statement parsing unit receives a query statement and parses a query table associated with the query statement. The storage unit stores the query statement temporarily. The synchronization control unit determines a query mechanism and receives a transformation state about the query table from the database transformer. Based on the query mechanism and the transformation state, the synchronization control unit performs the query statement in the source database, the target database, or both of them.

Abstract: Certain embodiments may include systems and methods that comprise a first unit controller associated with a first gas turbine and a second unit controller associated with a second gas turbine. A first unit human machine interface is coupled to the first unit controller and is operable to provide first blend information to the first unit controller. Additionally, a second unit human machine interface is coupled to the second unit controller and is operable to provide second blend information to the second unit controller. A splitter panel, coupled to the first unit controller and the second unit controller, is operable to transfer control of a plurality of common skids between the first unit controller and the second unit controller. The transfer of control may occur by toggling a plurality of relays housed in the splitter panel. A plurality of common skids is operable to provide biofuel to a plurality of injection skids.

Abstract: Certain embodiments may include systems and methods that comprise for injecting biofuel into a gas turbine system. The systems and methods comprise of storing a biofuel in a storage tank, injecting a first blend of biofuel into a first gas turbine, and injecting a second blend of biofuel in a second gas turbine concurrently with the injecting of the first blend into the first gas turbine. The method may further comprise creating turbine specific blends in real time by varying an amount of the respective blend of biofuel injected into each turbine.

Abstract: A method for detecting leakage at a fluid connection for a gas turbine fuel supply system is disclosed herein. The method includes closing a flow control valve at an upstream end of the fuel supply system and pressurizing the fuel supply system with a compressed medium via a compressed medium supply to a target pressure. The target pressure is less than a pressure threshold of a check valve that is disposed downstream from the compressed medium supply and upstream from a corresponding combustor of the gas turbine. The method further includes pointing a receiver portion of an ultrasonic detection device proximate to at least one tube fitting of the fuel supply system located between the flow control valve and a combustor which is fluidly coupled to the fuel supply system. Detection of an increase in sound level and/or the sound of popping at the tube fitting is indicative of a leak at the tube fitting.

Abstract: A synchronization system for transform databases and a method thereof are provided. The system includes a database transformer and a data adapter. The database transformer is used to transform tables from a source database to a target database. The data adapter includes a statement parsing unit, a storage unit and a synchronization control unit. The statement parsing unit receives a query statement and parses a query table associated with the query statement. The storage unit stores the query statement temporarily. The synchronization control unit determines a query mechanism and receives a transformation state about the query table from the database transformer. Based on the query mechanism and the transformation state, the synchronization control unit performs the query statement in the source database, the target database, or both of them.

Abstract: The present invention relates to a novel drug delivery and release system, i.e. Self-emulsifying Drug Delivery System (SEDDS), of butylphthalide, to a preparation process thereof, and to a use thereof in a pharmaceutical formulation. The drug delivery system comprises as essential ingredients 1% to 65% of butylphthalide and 10% to 65% of a emulsifying agent, together with various excipients as required depending on the desired dosage forms. The present invention significantly increases the contact area between butylphthalide and the mucous membrane of the gastrointestinal tract, and therefore improves the absorptivity of the drug.

Abstract: The present invention relates to a novel drug delivery and release system, i.e. Self-emulsifying Drug Delivery System (SEDDS), of butylphthalide, to a preparation process thereof, and to a use thereof in a pharmaceutical formulation. The drug delivery system comprises as essential ingredients 1% to 65% of butylphthalide and 10% to 65% of a emulsifying agent, together with various excipients as required depending on the desired dosage forms. The present invention significantly increases the contact area between butylphthalide and the mucous membrane of the gastrointestinal tract, and therefore improves the absorptivity of the drug.

Abstract: An integrated circuit is provided. A gate dielectric and a gate are provided respectively on and over a semiconductor substrate. A junction is formed adjacent the gate dielectric and a shaped spacer is formed around the gate. A spacer is formed under the shaped spacer and a liner is formed under the spacer. A first dielectric layer is formed over the semiconductor substrate, the shaped spacer, the spacer, the liner, and the gate. A second dielectric layer is formed over the first dielectric layer. A local interconnect opening is formed in the second dielectric layer down to the first dielectric layer. The local interconnect opening in the first dielectric layer is opened to expose the junction in the semiconductor substrate and the first gate. The local interconnect openings in the first and second dielectric layers are filled with a conductive material.

Abstract: A new method of provided for forming in one plane layers of semiconductor material having both high and low dielectric constants. Layers, having selected and preferably non-identical parameters of dielectric constants, are successively deposited interspersed with layers of etch stop material. The layers can be etched, creating openings there-through that can be filled with a a layer of choice.

Abstract: A heterojunction bipolar transistor (HBT), and manufacturing method therefor, comprising a semiconductor substrate having a collector region, an intrinsic base region of a compound semiconductive material over the collector region, an extrinsic base region, an emitter structure, an interlevel dielectric layer over the collector region, extrinsic base region and emitter structure, and connections through the interlevel dielectric layer to the base region, the emitter structure, and the collector region. The emitter structure is formed by forming a reverse emitter window over the intrinsic base region, which subsequently is etched to form an emitter window having a multi-layer reverse insulating spacer therein.

Abstract: A lateral heterojunction bipolar transistor (HBT), comprising a semiconductor substrate having having a first insulating layer over the semiconductor substrate. A base trench is formed in a first silicon layer over the first insulating layer to form a collector layer over an exposed portion of the semiconductor substrate and an emitter layer over the first insulating layer. A semiconductive layer is formed on the sidewalls of the base trench to form a collector structure in contact with the collector layer and an emitter structure in contact with the emitter layer. A base structure is formed in the base trench. A plurality of connections is formed through an interlevel dielectric layer to the collector layer, the emitter layer, and the base structure. The base structure preferably is a compound semiconductive material of silicon and at least one of silicon-germanium, silicon-germanium-carbon, and combinations thereof.

Abstract: An integrated circuit structure includes a semiconductor substrate and a horizontal semiconductor fin on top of the semiconductor substrate. An access transistor gate and a thyristor gate are on top of the semiconductor substrate and in contact with the horizontal semiconductor fin. An access transistor is at least a portion of the horizontal semiconductor fin and the access transistor gate. A thyristor is at least a portion of the horizontal semiconductor fin and the thyristor gate, the access transistor is in contact with the thyristor.

Abstract: A method for manufacturing an integrated circuit structure includes providing a semiconductor substrate and forming a trench therein. A thyristor is formed around the trench and within the semiconductor substrate. The thyristor has at least four layers with three P-N junctions therebetween. A gate for the thyristor is formed within the trench. An access transistor is formed on the semiconductor substrate. An interconnect is formed between the thyristor and the access transistor.

Abstract: A method of manufacturing a BiCMOS integrated circuit including a CMOS transistor having a gate structure, and a heterojunction bipolar transistor having an extrinsic base structure. A substrate is provided, and a polysilicon layer is formed over the substrate. The gate structure and the extrinsic base structure are formed in the polysilicon layer. A plurality of contacts is formed through the interlevel dielectric layer to the CMOS transistor and the heterojunction bipolar transistor.

Abstract: A CMOS RF device and a method to fabricate said device with low gate contact resistance are described. Conventional MOS transistor is first formed with isolation regions, poly-silicon gate structure, sidewall spacers around poly gate, and implanted source/drain with lightly and heavily doped regions. A silicon dioxide layer such as TEOS is deposited, planarized with chemical mechanical polishing (CMP) to expose the gate and treated with dilute HF etchant to recess the silicon dioxide layer below the surface of the gate. Silicon nitride is then deposited and planarized with CMP and then etched except around the gates, using a oversize poly-silicon gate mask. Inter-level dielectric mask is then deposited, contact holes etched, and contact metal is deposited to form the transistor. During contact hole etch over poly-silicon gate, silicon nitride around the poly gate acts as an etch stop.

Abstract: A method for manufacturing a heterojunction bipolar transistor is provided. An intrinsic collector structure is formed on a substrate. An extrinsic base structure partially overlaps the intrinsic collector structure. An intrinsic base structure is formed adjacent the intrinsic collector structure and under the extrinsic base structure. An emitter structure is formed adjacent the intrinsic base structure. An extrinsic collector structure is formed adjacent the intrinsic collector structure. A plurality of contacts is formed through an interlevel dielectric layer to the extrinsic collector structure, the extrinsic base structure, and the emitter structure.

Abstract: An improved and new process of fabricating high dielectric constant MIM capacitors. These high dielectric constant MIM capacitor met all of the stringent requirements needed for both for both RF and analog circuit applications. For the high dielectric constant MIM capacitor, the metal is comprised of copper electrodes in a dual damascene process. The dielectric constant versus the total thickness of super lattices is controlled by the number of layers either 4/4, 2/2, and 1/1 artificial layers. Hence thickness of the film can be easily controlled. Enhancement of dielectric constant is because of interface. Dielectric constants near 900 can be easily achieved for 250 Angstrom thick super lattices.

Abstract: A heterojunction bipolar transistor (HBT), and manufacturing method therefor, comprising a semiconductor substrate having a collector region, a number of insulating layers over the semiconductor substrate, at least one of the number of insulating layers having a base cavity over the collector region, a base structure of a compound semiconductive material in the base cavity, a window in the insulating layer over the base cavity, an emitter structure in the window, an interlevel dielectric layer, and connections through the interlevel dielectric layer to the base structure, the emitter structure, and the collector region. The base structure and the emitter structure preferably are formed in the same processing chamber.

Abstract: An integrated circuit structure includes a semiconductor substrate and a thyristor formed thereon. The thyristor has at least four layers, with three P-N junctions therebetween. At least two of the layers are formed horizontally and at least two of the layers are formed vertically. A gate is formed adjacent at least one of the vertically formed layers. An access transistor is formed on the semiconductor substrate, and an interconnect is formed between the thyristor and the access transistor.

Abstract: A method for manufacturing an integrated circuit structure includes providing a semiconductor substrate and forming two trenches in the semiconductor substrate to define an active region therebetween. An implanted source region is formed in one of the trenches on one side of the active region. An implanted drain region is formed in the other trench on the other side of the active region. Shallow trench isolations are then formed in the trenches. One or more gates are formed over the active region, and contacts to the implanted source region and the implanted drain region are formed.