Abstract: A processing device includes a plurality of modulators, the plurality of modulators performing modulation according to a first modulation scheme, a combiner configured to combine outputs from the plurality of modulators, and a signal processor configured to receive a bit stream and convert the bit stream into a plurality of input signals for the plurality of modulators such that the combiner generates a modulated output according to a second modulation scheme. The plurality of modulators may be low order modulators and a modulation schemes of the modulated output may include, for example, rotated quadrature phase shift keying (QPSK), pulse amplitude modulation (PAM), high order quadrature amplitude modulation (QAM), and multi-resolution high order quadrature amplitude modulation (M-QAM).