Abstract: A display device includes a substrate including a plurality of sub-pixels, a first buffer layer disposed on the substrate, a plurality of first signal lines disposed on the first buffer layer, a second buffer layer disposed on the plurality of first signal lines, a first transistor disposed on the second buffer layer and electrically connected to one of the plurality of first signal lines, a third buffer layer disposed on the first transistor, and a second transistor disposed on the third buffer layer.

Abstract: A display device includes a first pixel electrode in a first subpixel, on a planarization layer, and including first and second edges, a second pixel electrode in a second subpixel, on the planarization layer, spaced from the first pixel electrode, and including a third edge adjacent to the second and fourth edges, a bank respectively on the second and third edges of the first and second pixel electrodes, a first intermediate layer on the first pixel electrode and on a first side surface of the bank, a second intermediate layer on the second pixel electrode and on a second side surface of the bank, an organic layer on the bank and spaced from the first and second intermediate layers, first and second common electrodes respectively on the first and second intermediate layers, and a metal pattern on the organic layer and spaced apart from the first and second common electrodes.

Abstract: A display device includes: a substrate including a display area displaying an image and a non-display area outside the display area; and N data lines on the substrate. The substrate includes first to fifth areas sequentially located in a first direction. The display area includes first to fifth display areas in the first to fifth areas, respectively. The third area includes a third display area, a first non-display area on one side of the third display area, and a second non-display area on the other side of the third display area. The N data lines includes M1 data lines passing through the first non-display area within the third area, M2 data lines passing through the second non-display area within the third area, and M3 data lines passing through the third display area within the third area. A summation of M1, M2, and M3 corresponds to N.

Abstract: A display device can include a plurality of sub pixels disposed on a substrate; a first driver disposed in each of the plurality of sub pixels, the first driver being configured to generate a first driving current for a normal mode in which an image is displayed in a luminance range equal to or lower than a predetermined luminance; a second driver disposed in each of the plurality of sub pixels, the second driver being configured to generate a second driving current for a high luminance mode in which the luminance range is higher than the predetermined luminance; and a light emitting diode. Also, the light emitting diode is configured to receive the first driving current in the normal mode, and receive a sum of the first driving current and the second driving current in the high luminance mode.

Abstract: A display device and a display panel are disclosed that includes: a substrate including a display area including an optical area configured to display an image and allow light to be transmitted through the optical area and a normal area located outside of the optical area and configured to display the image; a first light emitting element in the optical area; a first color filter in the optical area and overlapping the light emitting element; and a first light shield in the optical area and overlapping the first light emitting element.

Abstract: Embodiments of the disclosure relate to a display device. Specifically, there may be provided a display device capable of suppressing flare when a camera is used by including an anode extension line having a curved shape.

Abstract: A display device can include a plurality of sub pixels disposed on a substrate; a first driver disposed in each of the plurality of sub pixels, the first driver being configured to generate a first driving current for a normal mode in which an image is displayed in a luminance range equal to or lower than a predetermined luminance; a second driver disposed in each of the plurality of sub pixels, the second driver being configured to generate a second driving current for a high luminance mode in which the luminance range is higher than the predetermined luminance; and a light emitting diode. Also, the light emitting diode is configured to receive the first driving current in the normal mode, and receive a sum of the first driving current and the second driving current in the high luminance mode.

Abstract: The disclosure relates to data driver and organic light emitting display device. The data driver includes: an input unit configured to receive an input data; a compensation data generator configured to generate a compensation data by applying a compensation value to the input data; a converter unit configured to convert the input data into an image data voltage and to convert the compensation data into a compensation data voltage; and an output unit configured to separately output the image data voltage and the compensation data voltage to a data line of the organic light emitting display.

Abstract: A display device is provided that includes a display panel divided into a plurality of blocks, each of the blocks including a plurality of lines of pixels and configured to be driven in a time-division manner with a touch sensing period interposed between two display periods, the two display periods corresponding to display periods for two adjacent blocks of the plurality of blocks. The display device further includes a display driving circuit, and a touch sensing unit configured to receive a sync signal for synchronizing the display driving circuit with the touch sensing unit. The display device is configured to change the sync signal every predetermined period of time so as to shift the touch sensing period interposed between the two display periods.

Abstract: Provided are a display device, a scan driver, and a method of manufacturing the same. A scan driver includes: a level shifter configured to output a power and a signal, and a scan signal generating circuit configured to generate a scan signal based on the power and the signal supplied from the level shifter, the scan signal generating circuit including a buffer configured to transmit a clock signal to a stage of a shift register, the buffer including two inverters, one of the two inverters being included in a multi-buffer.

Abstract: A display device and a gate driver circuit of the display device are disclosed. The display device includes a shift register that shifts a gate pulse in accordance with a shift clock and sequentially supplies the gate pulse to gate lines. At least one stage of the shift register includes a discharge blocking node connected to a source terminal of the second transistor, and a discharge blocking circuit configured to charge the discharge blocking node when the Q node is charged, and discharge the discharge blocking node when the Q node is discharged.

Abstract: The disclosure relates to data driver and organic light emitting display device. The data driver includes: an input unit configured to receive an input data; a compensation data generator configured to generate a compensation data by applying a compensation value to the input data; a converter unit configured to convert the input data into an image data voltage and to convert the compensation data into a compensation data voltage; and an output unit configured to separately output the image data voltage and the compensation data voltage to a data line of the organic light emitting display.

Abstract: A display device having a plurality of gate lines and a gate drive circuit is disclosed. The gate drive circuit includes a pull-up transistor configured to receive a first clock signal and to charge an output node to a voltage of the first clock signal based on a voltage of a Q node. The output node is connected to a corresponding one of the gate lines. The gate drive circuit also includes a switching circuit configured to charge the Q node based on a second clock signal. The switching circuit has an inverter circuit configured to control the voltage of the Q node based on the second clock signal.

Abstract: A display device is provided that includes a display panel divided into a plurality of blocks, each of the blocks including a plurality of lines of pixels and configured to be driven in a time-division manner with a touch sensing period interposed between two display periods, the two display periods corresponding to display periods for two adjacent blocks of the plurality of blocks. The display device further includes a display driving circuit, and a touch sensing unit configured to receive a sync signal for synchronizing the display driving circuit with the touch sensing unit. The display device is configured to change the sync signal every predetermined period of time so as to shift the touch sensing period interposed between the two display periods.

Abstract: A display device and a gate driver circuit of the display device are disclosed. The display device includes a shift register that shifts a gate pulse in accordance with a shift clock and sequentially supplies the gate pulse to gate lines. At least one stage of the shift register includes a discharge blocking node connected to a source terminal of the second transistor, and a discharge blocking circuit configured to charge the discharge blocking node when the Q node is charged, and discharge the discharge blocking node when the Q node is discharged.

Abstract: A display device having a plurality of gate lines and a gate drive circuit is disclosed. The gate drive circuit includes a pull-up transistor configured to receive a first clock signal and to charge an output node to a voltage of the first clock signal based on a voltage of a Q node. The output node is connected to a corresponding one of the gate lines. The gate drive circuit also includes a switching circuit configured to charge the Q node based on a second clock signal. The switching circuit has an inverter circuit configured to control the voltage of the Q node based on the second clock signal.

Abstract: Provided are a display device, a scan driver, and a method of manufacturing the same. A scan driver includes: a level shifter configured to output a power and a signal, and a scan signal generating circuit configured to generate a scan signal based on the power and the signal supplied from the level shifter, the scan signal generating circuit including a buffer configured to transmit a clock signal to a stage of a shift register, the buffer including two inverters, one of the two inverters being included in a multi-buffer.