Patents by Inventor Jiahua QU

Jiahua QU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Solar cell, manufacturing method thereof, and photovoltaic module
    Patent number: 11804564
    Abstract: Provided is a solar cell, including: an N-type semiconductor substrate having a front surface and a rear surface opposite to the front surface; a boron diffusion layer arranged on the front surface of the N-type semiconductor substrate, a first passivation layer is provided on a surface of the boron diffusion layer, and a first electrode is provided passing through the first passivation layer to form an electrical connection with the N-type semiconductor substrate; and a phosphorus-doped polysilicon layer arranged on the rear surface of the N-type semiconductor substrate. A silicon oxide layer containing nitrogen and phosphorus is provided between the rear surface of the N-type semiconductor substrate and the phosphorus-doped polysilicon layer, a second passivation layer is provided on a surface of the phosphorus-doped polysilicon layer, and a second electrode is provided passing through the second passivation layer to form an electrical connection with the phosphorus-doped polysilicon layer.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: October 31, 2023
    Assignee: Jinko Solar Co., Ltd.
    Inventors: Jiahua Qu, Jingsheng Jin, Linan Zhang
  • SOLAR CELL, MANUFACTURING METHOD THEREOF, AND PHOTOVOLTAIC MODULE
    Publication number: 20230079799
    Abstract: Provided is a solar cell, including: an N-type semiconductor substrate having a front surface and a rear surface opposite to the front surface; a boron diffusion layer arranged on the front surface of the N-type semiconductor substrate, a first passivation layer is provided on a surface of the boron diffusion layer, and a first electrode is provided passing through the first passivation layer to form an electrical connection with the N-type semiconductor substrate; and a phosphorus-doped polysilicon layer arranged on the rear surface of the N-type semiconductor substrate. A silicon oxide layer containing nitrogen and phosphorus is provided between the rear surface of the N-type semiconductor substrate and the phosphorus-doped polysilicon layer, a second passivation layer is provided on a surface of the phosphorus-doped polysilicon layer, and a second electrode is provided passing through the second passivation layer to form an electrical connection with the phosphorus-doped polysilicon layer.
    Type: Application
    Filed: May 5, 2022
    Publication date: March 16, 2023
    Inventors: Jiahua QU, Jingsheng JIN, Linan ZHANG