Patents by Inventor Jiale Su

Jiale Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220386052
    Abstract: A preparation method for a micro-electromechanical systems (MEMS) microphone includes the steps of: providing a silicon substrate having a silicon surface; forming an enclosed cavity in the silicon substrate; forming a plurality of spaced apart acoustic holes in the silicon substrate, each acoustic hole having two openings, one of which communicating with the cavity and the other one located on the silicon surface; forming a sacrificial layer on the silicon substrate, which includes a first filling portion, a second filling portion and a shielding portion; forming a polysilicon layer on the shielding portion; forming a recess in the silicon substrate on the side away from the silicon surface; and removing the first filling portion, the second filling portion and part of the shielding portion so that the recess is brought into communication with the cavity to form a back chamber, and that the polysilicon layer, the remainder of the shielding portion and the silicon substrate together delimit a hollow chamber,
    Type: Application
    Filed: May 26, 2020
    Publication date: December 1, 2022
    Inventors: Jiale SU, Guoping ZHOU, Xinwei ZHANG, Changfeng XIA
  • Patent number: 10816903
    Abstract: A photolithography system based on a high step slope may include a depositing unit configured to manufacture a sacrificial layer having high step slope on a substrate. The system may also include a coating unit configured to coat a photoresist layer on the sacrificial layer by performing a spin-on PR coating process to form a photolithographic layer. The system may further include a photolithography unit configured to perform one or more photolithography processes to the photolithographic layer. The photolithography unit may comprise a plurality of masks of compensation patterns. The compensation pattern may comprise a slope-top compensation pattern and a slope compensation pattern.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: October 27, 2020
    Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.
    Inventor: Jiale Su
  • Publication number: 20200243342
    Abstract: A method of forming a cavity based on a deep trench erosion, comprising: providing a semiconductor substrate (200), and performing the deep trench erosion to the semiconductor substrate to form an array of a plurality of trenches (201) in the semiconductor substrate (200), a pitch (D1) between the outermost grooves in the array being greater than a pitch (D2) between the remaining trenches in the array; and preforming an annealing treatment to the semiconductor substrate (200) to form a cavity (202) in the semiconductor substrate (200).
    Type: Application
    Filed: August 14, 2018
    Publication date: July 30, 2020
    Inventors: Jiale SU, Changfeng XIA, Guoping ZHOU, Xinwei ZHANG
  • Publication number: 20180188652
    Abstract: A photolithography system based on a high step slope may include a depositing unit configured to manufacture a sacrificial layer having high step slope on a substrate. The system may also include a coating unit configured to coat a photoresist layer on the sacrificial layer by performing a spin-on PR coating process to form a photolithographic layer. The system may further include a photolithography unit configured to perform one or more photolithography processes to the photolithographic layer. The photolithography unit may comprise a plurality of masks of compensation patterns. The compensation pattern may comprise a slope-top compensation pattern and a slope compensation pattern.
    Type: Application
    Filed: February 27, 2018
    Publication date: July 5, 2018
    Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.
    Inventor: Jiale SU
  • Patent number: 9939724
    Abstract: A photolithography method and system based on a high step slope are provided. The method includes: S1, manufacturing a sacrificial layer with a high step slope on a substrate; S2, adopting a spin-on PR coating process to cover the sacrificial layer with a photoresist layer to form a photolithographic layer; S3, forming a mask pattern and a compensation pattern on a mask; and S4, performing photolithography processes, by a photolithography machine, on the photolithographic layer. By forming a slope-top compensation pattern and a slope compensation pattern on a mask to perform photolithography on the substrate of a sacrificial layer, a relatively wide compensation pattern is set in a part of the top of the slope with a small thickness, thereby compensating the overexposure at the top of the slope, reducing the error in the photolithographic pattern, and improving the precision of photolithography of the high step slope.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: April 10, 2018
    Assignee: CSMC TECHNOLOGIES FABI CO., LTD.
    Inventor: Jiale Su
  • Patent number: 9371224
    Abstract: A silicon etching method of etching a silicon substrate to form silicon trenches having different width dimensions includes: S1, providing a silicon substrate; S2, depositing a mask layer on the silicon substrate; S3, corroding the mask layer to form windows having different width dimensions, wherein a mask layer having a certain thickness is reserved at least at a bottom portion of a window having a non-minimum width dimension, such that all the silicon trenches have the same depth after step S4; and S4, corroding the mask layer at the bottom portion of the window and the silicon substrate to form the silicon trenches. The mask layer having a certain thickness is reserved at the bottom portion of the window having the non-minimum width dimension, a relatively large window is protected, and a relatively small window is etched first, so that the finally obtained silicon trenches have the same depth.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: June 21, 2016
    Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.
    Inventor: Jiale Su
  • Publication number: 20150227048
    Abstract: A photolithography method and system based on a high step slope are provided. The method includes: S1, manufacturing a sacrificial layer with a high step slope on a substrate; S2, adopting a spin-on PR coating process to cover the sacrificial layer with a photoresist layer to form a photolithographic layer; S3, forming a mask pattern and a compensation pattern on a mask; and S4, performing photolithography processes, by a photolithography machine, on the photolithographic layer. By forming a slope-top compensation pattern and a slope compensation pattern on a mask to perform photolithography on the substrate of a sacrificial layer, a relatively wide compensation pattern is set in a part of the top of the slope with a small thickness, thereby compensating the overexposure at the top of the slope, reducing the error in the photolithographic pattern, and improving the precision of photolithography of the high step slope.
    Type: Application
    Filed: September 3, 2013
    Publication date: August 13, 2015
    Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.
    Inventor: Jiale Su
  • Publication number: 20150140823
    Abstract: A silicon etching method of etching a silicon substrate to form silicon trenches having different width dimensions includes: S1, providing a silicon substrate; S2, depositing a mask layer on the silicon substrate; S3, corroding the mask layer to form windows having different width dimensions, wherein a mask layer having a certain thickness is reserved at least at a bottom portion of a window having a non-minimum width dimension, such that all the silicon trenches have the same depth after step S4; and S4, corroding the mask layer at the bottom portion of the window and the silicon substrate to form the silicon trenches. The mask layer having a certain thickness is reserved at the bottom portion of the window having the non-minimum width dimension, a relatively large window is protected, and a relatively small window is etched first, so that the finally obtained silicon trenches have the same depth.
    Type: Application
    Filed: September 3, 2013
    Publication date: May 21, 2015
    Inventor: Jiale Su