Patents by Inventor Jialing Yang
Jialing Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250191926Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.Type: ApplicationFiled: February 19, 2025Publication date: June 12, 2025Inventors: Jon HENRI, Karthik S. COLINJIVADI, Francis Sloan ROBERTS, Kapu Sirish REDDY, Samantha SiamHwa TAN, Shih-Ked LEE, Eric HUDSON, Todd SHROEDER, Jialing YANG, Huifeng ZHENG
-
Patent number: 12249514Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.Type: GrantFiled: March 16, 2020Date of Patent: March 11, 2025Assignee: Lam Research CorporationInventors: Jon Henri, Karthik S. Colinjivadi, Francis Sloan Roberts, Kapu Sirish Reddy, Samantha Siamhwa Tan, Shih-Ked Lee, Eric Hudson, Todd Shroeder, Jialing Yang, Huifeng Zheng
-
Publication number: 20250068065Abstract: This disclosure relates generally to a patterning structure (and methods and apparatus for forming such structures) including substrate having a partially fabricated semiconductor device film stack, a radiation-sensitive imaging layer over the substrate, an underlayer below the radiation-sensitive imaging layer, the underlayer including a labile species, a hardmask positioned below the underlayer, and a diffusion barrier layer positioned between the underlayer and the hardmask layer, the diffusion barrier layer including a diffusion barrier material that reduces diffusion of the labile species from the underlayer into the hardmask layer. In various embodiments, the reduction of diffusion of the labile species downwards from the underlayer into the hardmask results in relatively greater diffusion of the labile species upwards from the underlayer into the radiation-sensitive imaging layer.Type: ApplicationFiled: January 9, 2023Publication date: February 27, 2025Inventors: Sivananda Krishnan Kanakasabapathy, Kevin M. McLaughlin, Jialing Yang, Arpan Pravin Mahorowala, Durgalakshmi Singhal
-
Publication number: 20240387258Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Inventors: Hui-Jung Wu, Bart J. Van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
-
Patent number: 12080592Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.Type: GrantFiled: September 10, 2019Date of Patent: September 3, 2024Assignee: Lam Research CorporationInventors: Hui-Jung Wu, Bart J. van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
-
Publication number: 20230323532Abstract: In some examples, a rib cover is provided for a multi-station processing module having a rib disposed between adjacent processing chambers. An example rib cover comprises a first portion for supporting the rib cover on the rib, a first side shield to cover a first wall of the rib when the rib cover is fitted thereto, and at least one spacer to hold an inner surface of the rib cover away from the covered rib.Type: ApplicationFiled: August 30, 2021Publication date: October 12, 2023Inventors: Keith Joseph Martin, Todd Schroeder, Kevin M. McLaughlin, Jiuyuan Nie, Jialing Yang, Chee Whye Woo
-
Publication number: 20220199417Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.Type: ApplicationFiled: March 16, 2020Publication date: June 23, 2022Inventors: Jon HENRI, Karthik S. COLINJIVADI, Francis Sloan ROBERTS, Kapu Sirish REDDY, Samantha SiamHwa TAN, Shih-Ked LEE, Eric HUDSON, Todd SHROEDER, Jialing YANG, Huifeng ZHENG
-
Publication number: 20220051938Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.Type: ApplicationFiled: September 10, 2019Publication date: February 17, 2022Inventors: Hui-Jung Wu, Bart J. van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
-
Patent number: 10784086Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and BI3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.Type: GrantFiled: November 28, 2017Date of Patent: September 22, 2020Assignee: LAM RESEARCH CORPORATIONInventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
-
Publication number: 20180102236Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and Bl3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.Type: ApplicationFiled: November 28, 2017Publication date: April 12, 2018Applicant: Lam Research CorporationInventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
-
Patent number: 9870899Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and BI3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.Type: GrantFiled: June 24, 2015Date of Patent: January 16, 2018Assignee: LAM RESEARCH CORPORATIONInventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
-
Publication number: 20160314985Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and BI3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.Type: ApplicationFiled: June 24, 2015Publication date: October 27, 2016Inventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
-
Patent number: 6621625Abstract: An optical node and method for operation in an ultra long haul backbone network that provides DWDM optical transmission and wavelength networking functionalities are disclosed. The optical node is designed with capabilities for amplification, dispersion compensation, and add/drop functionalities. In one embodiment, three erbium-doped fiber amplifier (EDFA) are cascaded using low nonlinearity and low loss dispersion compensating module (DCM).Type: GrantFiled: December 13, 2000Date of Patent: September 16, 2003Assignee: Avanex CorporationInventors: Lintao Zhang, Guohua Xiao, Charles Mao, Xiofan Cao, Jialing Yang, Jin Xie, Gang Li
-
Patent number: 6441959Abstract: The present invention provides a dispersion compensator which utilizes a Virtually Imaged Phased Array (VIPA), gratings, and birefringent wedges to moderate chromatic dispersion, dispersion slope and polarization mode dispersion, and a method and system for testing such a dispersion compensator.Type: GrantFiled: October 11, 2000Date of Patent: August 27, 2002Assignee: Avanex CorporationInventors: Jialing Yang, Simon Cao, Jiyong Ma, Christopher Lin
-
Patent number: 6392807Abstract: The present invention provides an improved tunable chromatic dispersion compensator. The compensator includes: a virtually imaged phased array (VIPA); at least one reflector optically coupled to the VIPA; a mirror optically coupled to the at least one reflector; and a movable reflector holder coupled to the at least one reflector, where the movable reflector holder moves the at least one reflector such that a length of a beam path between the VIPA and the at least one reflector and the mirror is variable. The present invention uses the VIPA to produce a controlled variable degree of chromatic dispersion within a plurality of optical channels so as to compensate for unwanted chromatic dispersion in an optical communications system. Positional adjustment of the movable reflector holder permits variable control of the beam path length between the VIPA and the focusing lens.Type: GrantFiled: December 22, 2000Date of Patent: May 21, 2002Assignee: Avanex CorporationInventors: Giovanni Barbarossa, Jialing Yang