Patents by Inventor Jian Deng

Jian Deng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250033056
    Abstract: A microwell array chip, a use method therefor, and a detection apparatus. The microwell array chip includes a microwell array substrate, and the microwell array substrate includes n reaction chambers, and an idle region; an array of the n reaction chambers is disposed in the microwell array substrate, and the idle region is disposed around the n reaction chambers; each reaction chamber is configured to accommodate a sample to be tested, and the shape of an orthographic projection of the reaction chamber on a first reference plane where the first main surface is located is of a regular N-gon; the area of the idle region is divided into n? virtual units, and the shape of the orthographic projection of each virtual unit on the first reference plane is the same as the shape of the orthographic projection of the reaction chamber on the first reference plane.
    Type: Application
    Filed: April 20, 2022
    Publication date: January 30, 2025
    Applicants: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ding DING, Jian XU, Lin DENG, Zhukai LIU
  • Patent number: 12204067
    Abstract: An automatic recognition method for a dry quasi-stationary front in Kunming, Yunnan, China is provided. The automatic recognition method includes: reading data; calculating, by a differential method, a temperature lapse rate between each layer of each point from a ground surface to 650 hPa, and acquiring a maximum inversion trend value; acquiring an initially selected inversion distribution based on the maximum inversion trend value; removing a nighttime clear sky radiation inversion, retaining only a frontal inversion, and binarizing (0, 1); finding a boundary between inversion and non-inversion; removing the abnormal candidate frontal points, and acquiring frontal nodes; removing meso- and micro-scale systems; and performing one-dimensional Gaussian filtering on longitude data of the frontal nodes, and connecting the filtered frontal nodes to acquire a quasi-stationary front in Kunming, Yunnan, China.
    Type: Grant
    Filed: March 12, 2024
    Date of Patent: January 21, 2025
    Assignee: Chengdu University of Information Technology
    Inventors: Wendong Hu, Yongkai Zhang, Hongping Shu, Yanqiong Hao, Tiangui Xiao, Yan Chen, Fei Luo, Jianhong Gan, Ying Zhang, Xiaohang Wen, Taisong Xiong, Jian Shao, Wenjie Zhou, Balin Xu, Huahong Li, Yixue Deng, Jingyi Tao
  • Patent number: 12191773
    Abstract: A control circuit for a resonant converter having at least two output signals, the control circuit including: a charge feedback circuit configured to generate a charge feedback signal representing a resonant current of a resonant circuit in the resonant converter; and a switching control signal generating circuit configured to generate switching control signals according to the charge feedback signal and feedback signals representing error information of each of the at least two output signals.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: January 7, 2025
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Jian Deng, Xiahe Zhang, Qiukai Huang
  • Patent number: 12132385
    Abstract: A control circuit for a resonant converter, can include: a feedforward circuit configured to generate a feedforward current; a charge feedback circuit configured to receive a resonant current sampling signal representing a resonant current of the resonant converter in a first mode to generate a charge feedback signal, and to receive the resonant current sampling signal and the feedforward current together to generate the charge feedback signal in a second mode; and a driving control circuit configured to generate driving signals according to the charge feedback signal and a first threshold signal, in order to control switching states of power transistors of the resonant converter, where the first threshold signal is generated according to an error compensation signal representing an error information between a feedback signal of an output signal of the resonant converter and a reference signal.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: October 29, 2024
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Chaojun Chen, Jian Deng, Jin Jin
  • Patent number: 12117284
    Abstract: Provided are a method and apparatus for measuring a geometric parameter of an object, and a terminal. The method includes: establishing a three-dimensional coordinate system based on a real environment, in accordance with a first depth image of the real environment photographed by a camera component; obtaining pose data of a terminal, obtaining a second depth image and a two-dimensional image of an object to be measured, and displaying the two-dimensional image on a display interface of the terminal; in response to a measurement point selection instruction, determining a coordinate in the three-dimensional coordinate system of a measurement point based on the pose data, the second depth image and the two-dimensional image, and determining a geometric parameter of the object to be measured based on the coordinate; and displaying, in the two-dimensional image, the geometric parameter of the object to be measured.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: October 15, 2024
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP. LTD.
    Inventor: Jian Deng
  • Patent number: 12114091
    Abstract: A delta image sensor comprising a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one single slope analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal, wherein the A/D circuit (12) is configured to use one of a plurality of ramps for the conversion; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output, in response to the changed level.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: October 8, 2024
    Assignees: Beijing Ruisizhixin Technology Co., Ltd, AlpsenTek GmbH
    Inventors: Yingyun Zha, Roger Mark Bostock, Jian Deng, Yu Zou
  • Publication number: 20240323572
    Abstract: Provided are an image sensor and an image output method thereof, and an optoelectronic device. The image sensor includes a plurality of pixels, which include a photoelectric detection circuit, a signal readout circuit, a floating diffusion node, an integrating capacitor, a transmission circuit, an adaptive power supply, and a signal processing circuit. The floating diffusion node integrates the photoelectric charge into the integrating capacitor to obtain an integral voltage. The signal processing circuit generates a logarithmic voltage and a logarithmic current. After the floating diffusion node receives the photoelectric charge, the target voltage is much less than the reference voltage. The node current is the photocurrent, and the node voltage is the integral voltage. When the target voltage increases to the reference voltage, the node current is the logarithmic current, and the node voltage is the logarithmic voltage, so the signal readout circuit finally outputs the corresponding image signals.
    Type: Application
    Filed: October 13, 2023
    Publication date: September 26, 2024
    Inventors: Jian Deng, Yingyun Zha
  • Patent number: 12088190
    Abstract: A zero-voltage-switching control circuit for a switching power supply having a main power switch and a synchronous rectifier switch, is configured to: control the synchronous rectifier switch to be turned on for a first time period before the main power switch is turned on and after a current flowing through the synchronous rectifier switch is decreased to zero according to a switching operation of the main power switch in a previous switching period of the main power switch; and where a drain-source voltage of the main power switch is decreased when the main power switch is turned on, in order to reduce conduction loss.
    Type: Grant
    Filed: April 7, 2023
    Date of Patent: September 10, 2024
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Jian Deng, Qiukai Huang
  • Patent number: 12068683
    Abstract: A controller of a switching power supply can include: a frequency-jittering control circuit configured to generate a first frequency-jittering signal and a second frequency-jittering signal; where a jittering range of an operating frequency of a power transistor in the switching power supply is adjusted by the first frequency-jittering signal; and where a jittering amplitude of a peak value of an inductor current of the switching power supply is adjusted by the second frequency-jittering signal.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: August 20, 2024
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Zhan Chen, Jian Deng, Xiaoru Xu
  • Patent number: 12069392
    Abstract: Provided are an image sensor and an image output method and application thereof. The image sensor includes an input circuit, configured to perform a first photoelectric conversion on incident light to generate a photoelectric current in an EVS mode working period, and performs s second photoelectric conversion on the incident light to generate photoelectric charges in an APS mode working period; an EVS circuit configured to output a corresponding event signal according to a difference value between a first voltage corresponding to a photoelectric current and a reference voltage; an APS circuit configured to output a corresponding grayscale signal according to a second voltage corresponding to photoelectric charges; and a control circuit configured to output a corresponding APS image according to the grayscale signal and output a corresponding EVS image according to the event signal.
    Type: Grant
    Filed: November 24, 2022
    Date of Patent: August 20, 2024
    Assignee: Shenzhen Ruishizhixin Technology Co., Ltd.
    Inventors: Yingyun Zha, Jian Deng
  • Patent number: 12052524
    Abstract: A delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level. A digital representation may be externally written to the digital storage circuit of the at least one pixel.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: July 30, 2024
    Assignees: Beijing Ruisizhixin Technology Co., Ltd, Alpsen Tek GmbH
    Inventors: Yingyun Zha, Roger Mark Bostock, Jian Deng, Yu Zou
  • Patent number: 12047702
    Abstract: A delta image sensor comprising an arrangement of pixels and acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes a sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; a digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and a digital output circuit configured to generate an event output when the level has changed. The repeat rate of the analogue to digital conversion is chosen from one or more repeat rates corresponding to modulation of the light signal.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: July 23, 2024
    Assignees: BEIJING RUISIZHIXIN TECHNOLOGY CO., LTD., Alpsen Tek GmbH
    Inventors: Yingyun Zha, Roger Mark Bostock, Jian Deng, Yu Zou
  • Patent number: 11962926
    Abstract: The present disclosure relates to an image sensor comprising a plurality of pixel circuits each comprising a photodiode connected between ground and a floating diffusion (FD) node, a reset transistor (MRST) connected between a first voltage supply and the floating diffusion (FD) node, and a source follower transistor (MSF), wherein its drain is connected to a second voltage supply, the gate is connected to a floating diffusion (FD) node and the source is connected to a row select transistor (MSEL). The row select transistor (MSEL) is connected between the source of the source follower transistor (MSF) and a common column output. Each pixel circuit is configured to output an output signal corresponding to a light incident on the photodiode. Each pixel circuit includes at least one additional transistor for configuring each pixel circuit to selectively output a linear integration signal or a logarithmic signal.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: April 16, 2024
    Assignee: Alpsentek GmbH
    Inventors: Yingyun Zha, Jian Deng, Roger Mark Bostock
  • Publication number: 20230390373
    Abstract: The invention relates to the field of biomedicine. In particular, the invention relates to a live strain of Staphylococcus aureus and uses thereof. More particularly, the invention relates to a live strain of Staphylococcus aureus which lacks adenosine synthase A (AdsA) activity, to a vaccine against Staphylococcus aureus infection comprising said live strain, and a method for preventing and/or treating Staphylococcus aureus infection in a subject by administering said live strain.
    Type: Application
    Filed: May 21, 2021
    Publication date: December 7, 2023
    Inventors: Jiandong HUANG, Kwok Yung YUEN, Baozhong ZHANG, Jian DENG, Hin CHU
  • Patent number: 11838015
    Abstract: A driving circuit and a driving method are provided. According to embodiments of the present disclosure, a power switch is driven by constant voltage or constant current during different time periods. The power switch is driven by using a first driving current during a Miller platform period, and the power switch is driven by using a second driving current when the Miller platform period ends, where the first driving current is less than the second driving current, so as to optimize EMI, reduce loss and improve efficiency.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: December 5, 2023
    Assignee: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
    Inventors: Zhan Chen, Jian Deng, Qiukai Huang
  • Patent number: 11831247
    Abstract: A control circuit for a resonant converter, that is configured to: adjust a conduction time of one power switch and a conduction time of one corresponding synchronous rectifier switch in the resonant converter in a resonant period detection mode; control a resonance current to cross zero twice during the conduction time of the synchronous rectifier switch; and obtain a resonant period of the resonant converter.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: November 28, 2023
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Jian Deng, Nan Luo, Yunlong Han, Zhaofeng Wang
  • Patent number: D1012933
    Type: Grant
    Filed: November 24, 2022
    Date of Patent: January 30, 2024
    Inventors: Yang Liu, Jian Deng, Ziyu Zhan
  • Patent number: D1012934
    Type: Grant
    Filed: November 24, 2022
    Date of Patent: January 30, 2024
    Inventors: Yang Liu, Jian Deng, Ziyu Zhan
  • Patent number: D1042406
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: September 17, 2024
    Assignee: SHENZHEN BAIFAN TECHNOLOGY CO., LTD.
    Inventors: Wenjie Zhou, Jian Deng
  • Patent number: D1049183
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: October 29, 2024
    Assignee: Shenzhen Creality 3D Technology Co., Ltd.
    Inventors: Jingke Tang, Zhiqiang Yang, Jian Deng