Patents by Inventor JIAN-HSIN LU

JIAN-HSIN LU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11952676
    Abstract: A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: April 9, 2024
    Assignee: GLOBALWAFERS CO., LTD.
    Inventors: Ching-Shan Lin, Jian-Hsin Lu, Chien-Cheng Liou, Man-Hsuan Lin
  • Publication number: 20230002929
    Abstract: A silicon carbide crystal includes a seed layer, a bulk layer, and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer, and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.
    Type: Application
    Filed: September 14, 2022
    Publication date: January 5, 2023
    Inventors: CHING-SHAN LIN, JIAN-HSIN LU, CHIEN-CHENG LIOU, MAN-HSUAN LIN
  • Publication number: 20220025549
    Abstract: A silicon carbide wafer and a method of fabricating the same are provided. In the silicon carbide wafer, a ratio (V:N) of a vanadium concentration to a nitrogen concentration is in a range of 2:1 to 10:1, and a portion of the silicon carbide wafer having a resistivity greater than 1012 ?·cm accounts for more than 85% of an entire wafer area of the silicon carbide wafer.
    Type: Application
    Filed: July 27, 2021
    Publication date: January 27, 2022
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Ching-Shan Lin, Chien-Cheng Liou, Jian-Hsin Lu
  • Patent number: 11041255
    Abstract: A silicon carbide crystal and a manufacturing method thereof are provided. The silicon carbide crystal includes an N-type seed layer, a barrier layer, and a semi-insulating ingot, which are sequentially stacked and are made of silicon carbide. The N-type seed layer has a resistivity within a range of 0.01-0.03 ?·cm. The barrier layer includes a plurality of epitaxial layers sequentially formed on the N-type seed layer by an epitaxial process. The C/Si ratios of the epitaxial layers gradually increase in a growth direction away from the N-type seed layer. A nitrogen concentration of the silicon carbide crystal gradually decreases from the N-type seed layer toward the semi-insulating ingot by a diffusion phenomenon, so that the semi-insulating crystal has a resistivity larger than 107 ?·cm.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: June 22, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Ching-Shan Lin, Jian-Hsin Lu, Chien-Cheng Liou, I-Ching Li
  • Publication number: 20210054525
    Abstract: A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.
    Type: Application
    Filed: October 16, 2020
    Publication date: February 25, 2021
    Inventors: CHING-SHAN LIN, JIAN-HSIN LU, CHIEN-CHENG LIOU, MAN-HSUAN LIN
  • Patent number: 10851470
    Abstract: A silicon carbide crystal and a method for manufacturing the same are disclosed. The silicon carbide crystal includes a seed layer, a bulk layer, and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer, and the stress buffering structure are each formed with a dopant that cycles between high and low concentration. Therefore, the crystal defects can be significantly reduced.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: December 1, 2020
    Assignee: GLOBALWAFERS CO., LTD.
    Inventors: Ching-Shan Lin, Jian-Hsin Lu, Chien-Cheng Liou, Man-Hsuan Lin
  • Publication number: 20200190693
    Abstract: A silicon carbide crystal and a manufacturing method thereof are provided. The silicon carbide crystal includes an N-type seed layer, a barrier layer, and a semi-insulating ingot, which are sequentially stacked and are made of silicon carbide. The N-type seed layer has a resistivity within a range of 0.01-0.03 ?·cm. The barrier layer includes a plurality of epitaxial layers sequentially formed on the N-type seed layer by an epitaxial process. The C/Si ratios of the epitaxial layers gradually increase in a growth direction away from the N-type seed layer. A nitrogen concentration of the silicon carbide crystal gradually decreases from the N-type seed layer toward the semi-insulating ingot by a diffusion phenomenon, so that the semi-insulating crystal has a resistivity larger than 107 ?·cm.
    Type: Application
    Filed: June 24, 2019
    Publication date: June 18, 2020
    Inventors: CHING-SHAN LIN, JIAN-HSIN LU, CHIEN-CHENG LIOU, I-CHING LI
  • Patent number: 10347481
    Abstract: A method for producing a silicon carbide wafer includes: providing a silicon carbide wafer having an unpolished surface; in which the unpolished surface has a first crystal face and a second crystal face; polishing one face of the first crystal face and the second crystal face of the unpolished surface in a first polishing solution by using a polisher; in which the polisher includes a polishing pad and a plurality of abrasive particles fixed on the polishing pad; and polishing the other face of the first crystal face and the second crystal face of the unpolished surface in a second polishing solution by using the polisher; in which a pH value of the first polishing solution is less than or equal to 7, and a pH value of the second polishing solution is greater than or equal to 7. The present disclosure also provides a silicon carbide wafer.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: July 9, 2019
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Ching-Shan Lin, Jian-Hsin Lu, Chien-Cheng Liou, I-Ching Li
  • Publication number: 20190115205
    Abstract: A method for producing a silicon carbide wafer includes: providing a silicon carbide wafer having an unpolished surface; in which the unpolished surface has a first crystal face and a second crystal face; polishing one face of the first crystal face and the second crystal face of the unpolished surface in a first polishing solution by using a polisher; in which the polisher includes a polishing pad and a plurality of abrasive particles fixed on the polishing pad; and polishing the other face of the first crystal face and the second crystal face of the unpolished surface in a second polishing solution by using the polisher; in which a pH value of the first polishing solution is less than or equal to 7, and a pH value of the second polishing solution is greater than or equal to 7. The present disclosure also provides a silicon carbide wafer.
    Type: Application
    Filed: December 15, 2017
    Publication date: April 18, 2019
    Inventors: CHING-SHAN LIN, JIAN-HSIN LU, CHIEN-CHENG LIOU, I-CHING LI
  • Publication number: 20190106811
    Abstract: A silicon carbide crystal and a manufacturing method for same are provided. A silicon carbide crystal seed used for the silicon carbide crystal has a crystal-growing surface with a surface roughness (Ra) less than 2.0 nm, and a thickness of the silicon carbide crystal seed is less than 700 ?m. Therefore, the silicon carbide crystal grown from the silicon carbide crystal seed by sublimation method (which is also a PVT method) may have low basal plane dislocation (BPD) and low micropipe density (MPD).
    Type: Application
    Filed: January 8, 2018
    Publication date: April 11, 2019
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Ching-Shan Lin, Jian-Hsin Lu, Chien-Cheng Liou, I-Ching Li
  • Publication number: 20190106807
    Abstract: A silicon carbide crystal and a method for manufacturing the same are disclosed. The silicon carbide crystal includes a seed layer, a bulk layer, and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer, and the stress buffering structure are each formed with a dopant that cycles between high and low concentration. Therefore, the crystal defects can be significantly reduced.
    Type: Application
    Filed: March 30, 2018
    Publication date: April 11, 2019
    Inventors: CHING-SHAN LIN, JIAN-HSIN LU, CHIEN-CHENG LIOU, MAN-HSUAN LIN