Patents by Inventor Jianhua Hu

Jianhua Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250062090
    Abstract: The present disclosure relates to a fast mechanical switch and an operating method, wherein the fast mechanical switch comprises: a closed housing; a vacuum interrupter; an electromagnetic repulsion mechanism disposed below the vacuum interrupter, wherein the electromagnetic repulsion mechanism has: a first repulsion unit electrically connected to a first electrical terminal; a second repulsion unit electrically connected to a second electrical terminal independent of the first electrical terminal and comprising a third repulsion disk located below and spaced apart from the second repulsion disk, wherein the second electrical terminal is constructed to operatively control the third repulsion disk responsive to the first repulsion unit such that the third repulsion disk applies a resistance to the second repulsion disk when the second repulsion disk is moved downwardly for opening and applies an thrust to the second repulsion disk when it is moved upwardly for closing.
    Type: Application
    Filed: August 13, 2024
    Publication date: February 20, 2025
    Inventors: Shunfeng Guo, Hui Zhou, Wenzhe Fan, Jianhua Chen, Zhengning Hu
  • Patent number: 12209088
    Abstract: The invention relates to activators of FXR useful in the treatment of autoimmune disorders, liver disease, intestinal disease, kidney disease, cancer, and other diseases in which FXR plays a role, having the Formula (I): wherein L1, A, X1, X2, R1, R2, and R3 are described herein.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: January 28, 2025
    Assignee: ARDELYX, INC.
    Inventors: Jianhua Chao, Rakesh Jain, Lily Hu, Jason Gustaf Lewis, Helene Baribault, Jeremy Caldwell
  • Patent number: 12070913
    Abstract: This application describes a method for manufacturing storage containers by spirally winding with multiple bundles of fibers. Two sets of yarn guide nozzles distributed in a circumferential array form a first spiral winding structure and a second spiral winding structure respectively, and a spiral winding device with the two layers of spiral winding structures cooperates with feeding devices carrying wound containers, to realize the spiral winding of the multiple bundles of fibers on the wound containers; the feeding devices drive the wound containers to do axial reciprocating motion and axial rotation, and the spiral winding device drives the yarn guide nozzles to do radial telescopic motion and self-rotation motion; and according to the lengths of axial dimensions of the wound containers, single-station double-layer spiral winding or double-station single-layer spiral winding is selected.
    Type: Grant
    Filed: November 14, 2023
    Date of Patent: August 27, 2024
    Assignee: TAIYUAN UNIVERSITY OF TECHNOLOGY
    Inventors: Jianguo Liang, Yujie Duan, Qingxue Huang, Jun Feng, Jianglin Liu, Lianyun Jiang, Xinyu Wen, Zhanchun Chen, Jianhua Hu, Zhaotun Jia
  • Patent number: 12027308
    Abstract: The present disclosure generally relates to a storage device comprising soft bias structures having high coercivity and high anisotropy, and a method of forming thereof. The soft bias structures may be formed by moving a wafer in a first direction under a plume of NiFe to deposit a first NiFe layer at a first angle, moving the wafer in a second direction anti-parallel to the first direction to deposit a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The soft bias structures may be formed by rotating a wafer to a first position, depositing a first NiFe layer at a first angle, rotating the wafer to a second position, depositing a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The first and second NiFe layers have different grain structures.
    Type: Grant
    Filed: April 3, 2023
    Date of Patent: July 2, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Masaya Nishioka, Diane L. Brown, Jianhua Hu, Cherngye Hwang
  • Publication number: 20230238179
    Abstract: The present disclosure generally relates to a storage device comprising soft bias structures having high coercivity and high anisotropy, and a method of forming thereof. The soft bias structures may be formed by moving a wafer in a first direction under a plume of NiFe to deposit a first NiFe layer at a first angle, moving the wafer in a second direction anti-parallel to the first direction to deposit a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The soft bias structures may be formed by rotating a wafer to a first position, depositing a first NiFe layer at a first angle, rotating the wafer to a second position, depositing a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The first and second NiFe layers have different grain structures.
    Type: Application
    Filed: April 3, 2023
    Publication date: July 27, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Masaya NISHIOKA, Diane L. BROWN, Jianhua HU, Cherngye HWANG
  • Patent number: 11631535
    Abstract: The present disclosure generally relates to a storage device comprising soft bias structures having high coercivity and high anisotropy, and a method of forming thereof. The soft bias structures may be formed by moving a wafer in a first direction under a plume of NiFe to deposit a first NiFe layer at a first angle, moving the wafer in a second direction anti-parallel to the first direction to deposit a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The soft bias structures may be formed by rotating a wafer to a first position, depositing a first NiFe layer at a first angle, rotating the wafer to a second position, depositing a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The first and second NiFe layers have different grain structures.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: April 18, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Masaya Nishioka, Diane L. Brown, Jianhua Hu, Cherngye Hwang
  • Publication number: 20230111296
    Abstract: The present disclosure generally relates to a storage device comprising soft bias structures having high coercivity and high anisotropy, and a method of forming thereof. The soft bias structures may be formed by moving a wafer in a first direction under a plume of NiFe to deposit a first NiFe layer at a first angle, moving the wafer in a second direction anti-parallel to the first direction to deposit a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The soft bias structures may be formed by rotating a wafer to a first position, depositing a first NiFe layer at a first angle, rotating the wafer to a second position, depositing a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The first and second NiFe layers have different grain structures.
    Type: Application
    Filed: October 7, 2021
    Publication date: April 13, 2023
    Inventors: Masaya Nishioka, Diane L. Brown, Jianhua Hu, Cherngye Hwang
  • Patent number: 10672919
    Abstract: One embodiment can provide a solar module. The solar module can include one or more moisture-resistant photovoltaic structures. A respective photovoltaic structure can include a base layer, an emitter layer positioned on a first side of the base layer, and a moisture barrier layer positioned on a first side of the emitter layer, thereby reducing the amount of moisture that reaches a junction between the base layer and the emitter layer.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: June 2, 2020
    Assignee: TESLA, INC.
    Inventors: Yangsen Kang, Zhigang Xie, Jianhua Hu
  • Publication number: 20190088802
    Abstract: One embodiment can provide a solar module. The solar module can include one or more moisture-resistant photovoltaic structures. A respective photovoltaic structure can include a base layer, an emitter layer positioned on a first side of the base layer, and a moisture barrier layer positioned on a first side of the emitter layer, thereby reducing the amount of moisture that reaches a junction between the base layer and the emitter layer.
    Type: Application
    Filed: September 19, 2017
    Publication date: March 21, 2019
    Applicant: TESLA, INC.
    Inventors: Yangsen Kang, Zhigang Xie, Jianhua Hu
  • Publication number: 20180062008
    Abstract: A system for fabrication of a photovoltaic structure is provided. During fabrication, the system can deposit a doped amorphous Si layer on a first surface of a crystalline Si substrate; and deposit, using a physical vapor deposition machine, a transparent conductive oxide layer on the doped amorphous Si layer. The deposited transparent conductive oxide layer can include In2O3 doped with TiO2 and Ta2O5, and depositing the transparent conductive oxide layer can involve maintaining the Si substrate at a temperature below 130° C. The system can further deposit a metallic layer on the transparent conductive oxide layer, and anneal the transparent conductive oxide layer.
    Type: Application
    Filed: August 23, 2016
    Publication date: March 1, 2018
    Applicant: SolarCity Corporation
    Inventors: Zhigang Xie, Yangsen Kang, Phillip M. Wu, Jianhua Hu
  • Publication number: 20170345954
    Abstract: A low-reflection-loss low-angle-sensitive colored photovoltaic (PV) module is described. This colored PV module includes a transparent substrate; an array of solar cells encapsulated between a top encapsulation sheet and a bottom encapsulation sheet; and a color filter structure embedded between the top encapsulation sheet and the transparent substrate and configured to cause wavelength-selective reflections of incident light received by the colored PV module. Moreover, the transparent substrate includes a flat front surface configured to receive the incident light and a texture back surface configured with an array of features. The color filter structure is formed on the textured back surface of the transparent substrate to create a textured interface between the textured back surface and the color filter structure.
    Type: Application
    Filed: October 14, 2016
    Publication date: November 30, 2017
    Applicant: SolarCity Corporation
    Inventors: Yangsen Kang, Zhigang Xie, Jianhua Hu, Zheng Xu
  • Patent number: 9391232
    Abstract: Provided are light emitting diodes (LEDs) and methods of fabricating such LEDs. An LED may include a transparent conductive oxide (TCO) layer having a varying refractive index. For example, the refractive index may be higher at the interface of the TCO layer with an epitaxial stack than on the side of the TCO layer. The refractive index variability allows reducing light intensity losses in the LED. The refractive index variability may be achieved by feeding a substrate through a deposition chamber having a variable concentration of at least one process gas, such as oxygen. Specifically, the concentration of the process gas may be higher at one slit opening than at another slit opening. As the substrate moves through the deposition chamber, the TCO layer is continuously deposited. Due to the concentration variability, the resulting TCO layer may have a variable composition throughout the thickness of the TCO layer.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: July 12, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Minh Huu Le, Jianhua Hu
  • Publication number: 20160181468
    Abstract: Provided are light emitting diodes (LEDs) and methods of fabricating such LEDs. An LED may include a transparent conductive oxide (TCO) layer having a varying refractive index. For example, the refractive index may be higher at the interface of the TCO layer with an epitaxial stack than on the side of the TCO layer. The refractive index variability allows reducing light intensity losses in the LED. The refractive index variability may be achieved by feeding a substrate through a deposition chamber having a variable concentration of at least one process gas, such as oxygen. Specifically, the concentration of the process gas may be higher at one slit opening than at another slit opening. As the substrate moves through the deposition chamber, the TCO layer is continuously deposited. Due to the concentration variability, the resulting TCO layer may have a variable composition throughout the thickness of the TCO layer.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: Minh Huu Le, Jianhua Hu
  • Publication number: 20160111603
    Abstract: Provided are light emitting diodes (LEDs) and methods of fabricating such LEDs. Specifically, an LED has an epitaxial stack and current distribution layer disposed on and interfacing the epitaxial stack. The current distribution layer includes indium oxide and zinc oxide such that the concentration of indium oxide is between about 5% and 15% by weight. During fabrication, the current distribution layer is annealed at a temperature of less than about 500° C. or even at less than about 400° C. These low anneal temperature helps preserving the overall thermal budget of the LED while still yielding a current distribution layer having a low resistivity and low adsorption. A particular composition and method of forming the current distribution layer allows using lower annealing temperatures. In some embodiments, the current distribution layer is sputtered using indium oxide and zinc oxide targets at a pressure of less than 5 mTorr.
    Type: Application
    Filed: October 21, 2014
    Publication date: April 21, 2016
    Inventors: Jianhua Hu, Ben Cardozo, Minh Huu Le, Sandeep Nijhawan, J.H. Yeh
  • Patent number: 9306126
    Abstract: Transparent conductive layers usable as ohmic contacts for III-V semiconductors with work functions between 4.1 and 4.7 eV are formed by annealing layers of transparent oxide with thin (0.1-5nm) layers of conductive metal. When the layers interdiffuse during the annealing, some of the conductive metal atoms remain free to reduce resistivity and others oxidize to reduce optical absorption. Examples of the transparent oxides include indium-tin oxide, zinc oxide, and aluminum zinc oxide with up to 5 wt % Al. Examples of the metals include aluminum and titanium. The work function of the transparent conductive layer can be tuned to match the contacted semiconductor by adjusting the ratio of metal to transparent oxide.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: April 5, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Jianhua Hu, Heng-Kai Hsu, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
  • Patent number: 9246062
    Abstract: Transparent ohmic contacts to p-GaN and other high-work-function (?4.2 eV) semiconductors are fabricated from zinc stannate (e.g., ZnSnO3). ZnO and SnO2 may be sputtered from separate targets and annealed to form the zinc stannate. The Zn:Sn ratio may be tuned over the range between 1:2 and 2:1 to optimize bandgap, work function, conductivity, and transparency for the particular semiconductor and wavelength of interest. Conductivity may be improved by crystallizing the zinc stannate, by doping with up to 5 wt % Al or In, or both.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: January 26, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Jianhua Hu, Heng Kai Hsu, Tong Ju, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
  • Publication number: 20160013367
    Abstract: Transparent conductive layers usable as ohmic contacts for III-V semiconductors with work functions between 4.1 and 4.7 eV are formed by annealing layers of transparent oxide with thin (0.1-5 nm) layers of conductive metal. When the layers interdiffuse during the annealing, some of the conductive metal atoms remain free to reduce resistivity and others oxidize to reduce optical absorption. Examples of the transparent oxides include indium-tin oxide, zinc oxide, and aluminum zinc oxide with up to 5 wt % Al. Examples of the metals include aluminum and titanium. The work function of the transparent conductive layer can be tuned to match the contacted semiconductor by adjusting the ratio of metal to transparent oxide.
    Type: Application
    Filed: July 14, 2014
    Publication date: January 14, 2016
    Inventors: Jianhua Hu, Heng-Kai Hsu, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
  • Publication number: 20150318446
    Abstract: A ternary transparent conductive oxide, indium zinc oxide (IZO), is formed as a thin film by co-sputtering zinc oxide with indium oxide at a deposition temperature between 25 and 200 C. Optionally, up to 1-2% Al may be added by various methods. The layers may be annealed at temperatures between 200 and 400 C. Measurements of IZO with 75-85 wt % In2O3 showed low resistivity and low visible absorbance, both of which were thermally stable up to 400 C.
    Type: Application
    Filed: April 30, 2014
    Publication date: November 5, 2015
    Applicant: Intermolecular, Inc.
    Inventors: Jianhua Hu, Heng Kai Hsu, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
  • Publication number: 20150311397
    Abstract: Transparent ohmic contacts to p-GaN and other high-work-function (?4.2 eV) semiconductors are fabricated from zinc stannate (e.g., ZnSnO3). ZnO and SnO2 may be sputtered from separate targets and annealed to form the zinc stannate. The Zn:Sn ratio may be tuned over the range between 1:2 and 2:1 to optimize bandgap, work function, conductivity, and transparency for the particular semiconductor and wavelength of interest. Conductivity may be improved by crystallizing the zinc stannate, by doping with up to 5 wt % Al or In, or both.
    Type: Application
    Filed: April 23, 2014
    Publication date: October 29, 2015
    Applicant: INTERMOLECULAR, INC.
    Inventors: Jianhua Hu, Heng Kai Hsu, Tong Ju, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
  • Patent number: D915435
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: April 6, 2021
    Assignee: NIO (ANHUI) HOLDING CO., LTD.
    Inventors: Wenjie Yan, Li Yao, Jianhua Hu, Feng Zhang