Patents by Inventor Jian-Jhong Chen
Jian-Jhong Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955154Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.Type: GrantFiled: May 16, 2022Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
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Patent number: 11942130Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.Type: GrantFiled: March 23, 2022Date of Patent: March 26, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
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Patent number: 11903325Abstract: A memory device includes a substrate; an active area extending along a first direction on the substrate; a gate line traversing the active area and extending along a second direction that is not parallel to the first direction; a source doped region in the active area and on a first side of the gate line; a main source line extending along the first direction; a source line extension coupled to the main source line and extending along the second direction; a drain doped region in the active area and on a second side of the gate line that is opposite to the first side; and a data storage element electrically coupled to the drain doped region. The main source line is electrically connected to the source doped region via the source line extension.Type: GrantFiled: May 2, 2022Date of Patent: February 13, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh, Jian-Jhong Chen, Bo-Chang Li
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Publication number: 20230343379Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.Type: ApplicationFiled: May 16, 2022Publication date: October 26, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
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Publication number: 20230282260Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.Type: ApplicationFiled: March 23, 2022Publication date: September 7, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
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Publication number: 20220384523Abstract: A MRAM circuit structure is provided in the present invention, with the unit cell composed of three transistors in series and four MTJs, wherein the junction between first transistor and third transistor is first node, the junction between second transistor and third transistor is second node, and the other ends of first transistor and third transistor are connected to a common source line. First MTJ is connected to second MTJ in series to form a first MTJ pair that connecting to the first node, and third MTJ is connected to fourth MTJ in series to form a second MTJ pair that connecting to the second node.Type: ApplicationFiled: July 7, 2021Publication date: December 1, 2022Applicant: UNITED MICROELECTRONICS CORP.Inventors: Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen, Bo-Chang Li
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Publication number: 20220263012Abstract: A memory device includes a substrate; an active area extending along a first direction on the substrate; a gate line traversing the active area and extending along a second direction that is not parallel to the first direction; a source doped region in the active area and on a first side of the gate line; a main source line extending along the first direction; a source line extension coupled to the main source line and extending along the second direction; a drain doped region in the active area and on a second side of the gate line that is opposite to the first side; and a data storage element electrically coupled to the drain doped region. The main source line is electrically connected to the source doped region via the source line extension.Type: ApplicationFiled: May 2, 2022Publication date: August 18, 2022Applicant: UNITED MICROELECTRONICS CORP.Inventors: Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh, Jian-Jhong Chen, Bo-Chang Li
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Patent number: 11355695Abstract: A memory device includes a substrate; an active area extending along a first direction on the substrate; a gate line traversing the active area and extending along a second direction that is not parallel to the first direction; a source doped region in the active area and on a first side of the gate line; a main source line extending along the first direction; a source line extension coupled to the main source line and extending along the second direction; a drain doped region in the active area and on a second side of the gate line that is opposite to the first side; and a data storage element electrically coupled to the drain doped region. The main source line is electrically connected to the source doped region via the source line extension.Type: GrantFiled: April 19, 2020Date of Patent: June 7, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh, Jian-Jhong Chen, Bo-Chang Li
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Patent number: 11238912Abstract: In an MRAM, each unit cell includes two non-volatile storage units, three N-type transistors and three P-type transistors. Each N-type transistor is coupled in parallel with a corresponding P-type transistor for forming a transmission gate which provides bi-directional current, thereby preventing source degeneration.Type: GrantFiled: January 11, 2021Date of Patent: February 1, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen, Bo-Chang Li
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Publication number: 20210313509Abstract: A memory device includes a substrate; an active area extending along a first direction on the substrate; a gate line traversing the active area and extending along a second direction that is not parallel to the first direction; a source doped region in the active area and on a first side of the gate line; a main source line extending along the first direction; a source line extension coupled to the main source line and extending along the second direction; a drain doped region in the active area and on a second side of the gate line that is opposite to the first side; and a data storage element electrically coupled to the drain doped region. The main source line is electrically connected to the source doped region via the source line extension.Type: ApplicationFiled: April 19, 2020Publication date: October 7, 2021Inventors: Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh, Jian-Jhong Chen, Bo-Chang Li
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Publication number: 20210183944Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes a first magnetic tunneling junction (MTJ) pattern on a substrate, a second MTJ pattern adjacent to the first MTJ pattern, and a third MTJ pattern between the first MTJ pattern and the second MTJ pattern. Preferably, the first MTJ pattern, the second MTJ pattern, and the third MTJ pattern constitute a staggered arrangement.Type: ApplicationFiled: January 20, 2020Publication date: June 17, 2021Inventors: Yi-Ting Wu, Jian-Jhong Chen, Po-Chun Yang, Jhen-Siang Wu, Yung-Ching Hsieh, Bo-Chang Li, Jen-Yu Wang, Cheng-Tung Huang
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Patent number: 11018185Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes a first magnetic tunneling junction (MTJ) pattern on a substrate, a second MTJ pattern adjacent to the first MTJ pattern, and a third MTJ pattern between the first MTJ pattern and the second MTJ pattern. Preferably, the first MTJ pattern, the second MTJ pattern, and the third MTJ pattern constitute a staggered arrangement.Type: GrantFiled: January 20, 2020Date of Patent: May 25, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yi-Ting Wu, Jian-Jhong Chen, Po-Chun Yang, Jhen-Siang Wu, Yung-Ching Hsieh, Bo-Chang Li, Jen-Yu Wang, Cheng-Tung Huang
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Patent number: 10978122Abstract: A memory includes (n?1) non-volatile cells, (n?1) bit lines and a current driving circuit. Each of the (n?1) non-volatile cells includes a first terminal and a second terminal. An ith bit line of the (n?1) bit lines is coupled to a first terminal of an ith non-volatile cell of the (n?1) non-volatile cells. The current driving circuit includes n first transistors coupled to the (n?1) non-volatile cells.Type: GrantFiled: February 21, 2020Date of Patent: April 13, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Chang-Hung Chen, Shu-Ru Wang, Ya-Lan Chiou, Chun-Hsien Huang, Chih-Wei Tsai, Hsin-Chih Yu, Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Jhen-Siang Wu, Po-Chun Yang, Yung-Ching Hsieh, Jian-Jhong Chen, Bo-Chang Li
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Patent number: 10651235Abstract: A first MRAM set includes a first transistor and a second transistor. The first transistor includes a first gate structure, a first source/drain doping region and a first common source/drain doping region. The second transistor includes a second gate structure, a second source/drain doping region and the first common source/drain doping region. A second MTJ is disposed on the second transistor. The first common source/drain doping region electrically connects to the second MTJ. A first MTJ is disposed on the first transistor. The sizes of the first MTJ and the second MTJ are different. The second MTJ connects to the first MTJ in series. A bit line electrically connects the first MTJ. A source line electrically connects to the first source/drain doping region and the second source/drain doping region.Type: GrantFiled: March 8, 2019Date of Patent: May 12, 2020Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yi-Ting Wu, Jhen-Siang Wu, Po-Chun Yang, Yung-Ching Hsieh, Zong-Sheng Zheng, Jian-Jhong Chen, Jen-Yu Wang, Cheng-Tung Huang
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Patent number: 8522602Abstract: A system is provided for detecting a liquid sample, and includes: a flow cell assembly formed with a sample receiving space therein, and inlet and outlet channels extending to the sample receiving space for guiding the liquid sample into and away from the sample receiving space; a sensor device including a sample detecting unit that is disposed in the sample receiving space, and that is operable to detect the liquid sample and to generate a detection signal accordingly, and a signal conducting unit that is connected electrically to the sensor device for conducting the detection signal therefrom; and a liquid introducing unit and a liquid discharging unit coupled to the inlet and outlet channels and cooperating therewith to form an introducing path and a discharging path for introducing the liquid sample into and for discharging the liquid sample from the sample receiving space, respectively.Type: GrantFiled: April 21, 2011Date of Patent: September 3, 2013Assignee: I Shou UniversityInventors: Chi-Yen Shen, Ke-Nung Huang, Shen-Li Fu, Jian-Jhong Chen, Yu-Fong Huang
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Publication number: 20120266662Abstract: A system is provided for detecting a liquid sample, and includes: a flow cell assembly formed with a sample receiving space therein, and inlet and outlet channels extending to the sample receiving space for guiding the liquid sample into and away from the sample receiving space; a sensor device including a sample detecting unit that is disposed in the sample receiving space, and that is operable to detect the liquid sample and to generate a detection signal accordingly, and a signal conducting unit that is connected electrically to the sensor device for conducting the detection signal therefrom; and a liquid introducing unit and a liquid discharging unit coupled to the inlet and outlet channels and cooperating therewith to form an introducing path and a discharging path for introducing the liquid sample into and for discharging the liquid sample from the sample receiving space, respectively.Type: ApplicationFiled: April 21, 2011Publication date: October 25, 2012Applicant: I SHOU UNIVERSITYInventors: Chi-Yen Shen, Ke-Nung Huang, Shen-Li Fu, Jian-Jhong Chen, Yu-Fong Huang
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Patent number: 8241570Abstract: A flow cell device is formed with: a plurality of cell recess portions adapted to cooperate with a plurality of sensor devices to confine a plurality of sample receiving space for receiving a liquid sample, respectively; a plurality of pairs of first and second guiding channels, each pair being in fluid communication with a respective one of the cell recess portions; a number of connecting recess portions each fluidly communicating the first and second guiding channels that respectively extend to a corresponding pair of the cell recess portions such that the liquid sample is able to flow through the sample receiving spaces sequentially; and inlet and outlet channels in fluid communication with the first and second guiding channels that respectively extend to a first one and a last one of the cell recess portions for introducing and discharging the liquid sample into and from the flow cell device, respectively.Type: GrantFiled: February 3, 2011Date of Patent: August 14, 2012Assignee: I Shou UniversityInventors: Chi-Yen Shen, Jian-Jhong Chen, Yu-Fong Huang
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Publication number: 20120199479Abstract: A flow cell device is formed with: a plurality of cell recess portions adapted to cooperate with a plurality of sensor devices to confine a plurality of sample receiving space for receiving a liquid sample, respectively; a plurality of pairs of first and second guiding channels, each pair being in fluid communication with a respective one of the cell recess portions; a number of connecting recess portions each fluidly communicating the first and second guiding channels that respectively extend to a corresponding pair of the cell recess portions such that the liquid sample is able to flow through the sample receiving spaces sequentially; and inlet and outlet channels in fluid communication with the first and second guiding channels that respectively extend to a first one and a last one of the cell recess portions for introducing and discharging the liquid sample into and from the flow cell device, respectively.Type: ApplicationFiled: February 3, 2011Publication date: August 9, 2012Applicant: I SHOU UNIVERSITYInventors: Chi-Yen Shen, Jian-Jhong Chen, Yu-Fong Huang