Patents by Inventor Jian Miremadi
Jian Miremadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11927436Abstract: Example implementations relate to an inspection method for training a measurement machine to accurately measure side joint lengths and detecting a defect among a plurality of solder joints. The method includes receiving a first data representing the side joint lengths of the plurality of solder joints measured by a first measurement machine and a second data representing the side joint lengths measured by a second measurement machine. Further, the method includes determining a correlation value based on a statistical analysis of a relationship between the first data and the second data. The method further includes updating an algorithm used by the first measurement machine to measure the side joint lengths, based on the correlation value to reduce deviation between the first data and the second data. Later, the updated algorithm is used as a dimensional metrology in the first measurement machine for detecting the defect in the solder joints.Type: GrantFiled: August 17, 2021Date of Patent: March 12, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Jaime E. Llinas, Saravanan Rathakrishnan, Yanyan Xia, ZeLin Wu, Yanli Li, JunHui Li, Jian Miremadi
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Patent number: 11705652Abstract: Apparatus including an elongated body to couple with a surface mount connector to reduce or prevent deformation of the surface mount connector during soldering of the surface mount connector to a substrate, the surface mount connector including a connector housing having a first end portion and a second end portion. In one implementation, the elongated body may include: a first body end portion forming a first tab insertable into a first portion of a socket defined by the first housing end portion; and a second body end portion forming a second tab insertable into a second portion of the socket defined by the second housing end portion.Type: GrantFiled: October 27, 2020Date of Patent: July 18, 2023Assignee: Hewlett Packard Enterprise Development LPInventors: Jian Miremadi, David A. Moore, John Norton, Eduardo F. Velazquez
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Publication number: 20230059410Abstract: Example implementations relate to an inspection method for training a measurement machine to accurately measure side joint lengths and detecting a defect among a plurality of solder joints. The method includes receiving a first data representing the side joint lengths of the plurality of solder joints measured by a first measurement machine and a second data representing the side joint lengths measured by a second measurement machine. Further, the method includes determining a correlation value based on a statistical analysis of a relationship between the first data and the second data. The method further includes updating an algorithm used by the first measurement machine to measure the side joint lengths, based on the correlation value to reduce deviation between the first data and the second data. Later, the updated algorithm is used as a dimensional metrology in the first measurement machine for detecting the defect in the solder joints.Type: ApplicationFiled: August 17, 2021Publication date: February 23, 2023Inventors: Jaime E. Llinas, Saravanan Rathakrishnan, Yanyan Xia, ZeLin Wu, Yanli Li, JunHui Li, Jian Miremadi
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Publication number: 20210044039Abstract: Apparatus including an elongated body to couple with a surface mount connector to reduce or prevent deformation of the surface mount connector during soldering of the surface mount connector to a substrate, the surface mount connector including a connector housing having a first end portion and a second end portion. In one implementation, the elongated body may include: a first body end portion forming a first tab insertable into a first portion of a socket defined by the first housing end portion; and a second body end portion forming a second tab insertable into a second portion of the socket defined by the second housing end portion.Type: ApplicationFiled: October 27, 2020Publication date: February 11, 2021Inventors: Jian Miremadi, David A. Moore, John Norton, Eduardo F. Velazquez
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Patent number: 10833438Abstract: Apparatus including an elongated body to couple with a surface mount connector to reduce or prevent deformation of the surface mount connector during soldering of the surface mount connector to a substrate, the surface mount connector including a connector housing having a first end portion and a second end portion. In one implementation, the elongated body may include: a first body end portion forming a first tab insertable into a first portion of a socket defined by the first housing end portion; and a second body end portion forming a second tab insertable into a second portion of the socket defined by the second housing end portion.Type: GrantFiled: May 1, 2019Date of Patent: November 10, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Jian Miremadi, David A. Moore, John Norton, Eduardo F. Velazquez
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Publication number: 20200350714Abstract: Apparatus including an elongated body to couple with a surface mount connector to reduce or prevent deformation of the surface mount connector during soldering of the surface mount connector to a substrate, the surface mount connector including a connector housing having a first end portion and a second end portion. In one implementation, the elongated body may include: a first body end portion forming a first tab insertable into a first portion of a socket defined by the first housing end portion; and a second body end portion forming a second tab insertable into a second portion of the socket defined by the second housing end portion.Type: ApplicationFiled: May 1, 2019Publication date: November 5, 2020Inventors: Jian Miremadi, David A. Moore, John Norton, Eduardo F. Velazquez
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Patent number: 5889332Abstract: A chip-scale packaged integrated circuit and fabrication method are disclosed in which a semiconductor die and a rigid carrier of substantially identical geometric shape and size are aligned to form a packaged IC in which the die and carrier have a substantially 1:1 area ratio. A narrow gap between the die and carrier is bridged by the contact interconnections. An underfill material filling the gap and bonded to the die and carrier faces to relieve thermal expansion mismatch stresses. A fillet on one or more sides of the package is generally T-shaped in cross-section and nearly flat to the aligned side faces of the die and carrier. A fixture to facilitate fabrication of the package has a cavity with beveled sidewalls and seal which hold the die and carrier and form a narrow trough along the gap to receive and hold the underfill material adjacent the gap. The seal and cavity sidewalls have a surface to which the underfill material is nonadherent.Type: GrantFiled: February 21, 1997Date of Patent: March 30, 1999Assignee: Hewlett-Packard CompanyInventors: Robert M. Lawson, Jian Miremadi
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Patent number: 5854507Abstract: This disclosure provides a multiple chip assembly where multiple chips are stacked on top of one another using relatively low melting temperature solder balls. Preferably, the chips (either packages or flip chip attachment) are each mounted to a substrate which is larger in lateral surface area than the associated chip. Each substrate thus has a free area, not masked by the chip, which is utilized to mount a vertically-adjacent substrate. Within this free area, solder balls connect the substrates to provide for vertical logic bus propagation through the assembly and vertical heat dissipation. The solder balls are made to have a relatively low melting temperature, permitting interconnection between chip/substrate layers without affecting connection between chip and substrate or with an intervening carrier.Type: GrantFiled: July 21, 1998Date of Patent: December 29, 1998Assignee: Hewlett-Packard CompanyInventors: Jian Miremadi, Marc P. Schuyler