Patents by Inventor Jian Tsai

Jian Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240355639
    Abstract: A package structure and a method of manufacturing the same are provided. The method of manufacturing the package structure includes several steps as follows. A lead frame is provided. A first mask layer is formed on an upper surface of the lead frame and a second mask layer is formed on a lower surface of the lead frame, so that the first mask layer, the lead frame and the second mask layer are formed together to be a multilayered structure. A patterning process is performed on the multilayered structure, so a through hole penetrating through the multilayered structure is formed. A sandblasting process is performed in the through hole to form a rough textured surface in the through hole. After that, the first mask layer and the second mask layer are removed to expose the upper surface and the lower surface of the lead frame.
    Type: Application
    Filed: October 16, 2023
    Publication date: October 24, 2024
    Inventors: Chin-Jui YU, Jheng-Dong HUANG, Yin-Hsien YANG, Jian-Tsai CHANG
  • Patent number: 11984385
    Abstract: The present disclosure is related to a lead frame structure. The lead frame structure includes a bottom board and a blocking wall. The bottom board has a first conductive portion and a second conductive portion. The first conductive portion separates from the second conductive portion. The first and second conductive portions are configured to electrically connect to a light source. The blocking wall is located on the bottom board, and the blocking wall surrounds an opening. The first and the second conductive portions are exposed from the opening. The first and the second conductive portions each have an extending portion. The extending portion extends beyond an external surface of the blocking wall in a horizontal direction.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: May 14, 2024
    Assignee: Jentech Precision Industrial Co., LTD.
    Inventors: Jian-Tsai Chang, Chin-Jui Yu, Chun-Hsiung Wang, Wei-Chi Lin
  • Publication number: 20230343901
    Abstract: A light emitting diode module includes a first conductive device, a second conductive device, an insulating structure and a plating layer. The first conductive device includes a first metal layer and a first protecting layer covering the first metal layer. The second conductive device includes a second metal layer and a second protecting layer covering the second metal layer. The insulating structure covers around and forms gaps with the first and the second conductive devices. The plating layer is disposed on the first and the second protecting layers to fill up the gaps. The plating layer is of a same material as the first protecting layer and the second protecting layer. The insulating structure covers portions of upper surfaces of the first and the second conductive devices. The plating layer covers remaining portions of the upper surfaces of the first and the second conductive devices.
    Type: Application
    Filed: July 5, 2023
    Publication date: October 26, 2023
    Inventors: Jian-Tsai CHANG, Chin-Jui YU, Jheng-Dong HUANG
  • Patent number: 11705547
    Abstract: A light emitting diode module includes a first conductive device, a second conductive device, an insulating structure and a plating layer. The first conductive device includes a first metal layer and a first protecting layer covering the first metal layer. The second conductive device includes a second metal layer and a second protecting layer covering the second metal layer. The insulating structure covers around the first and the second conductive devices. The plating layer is disposed on the first and the second protecting layers in a first and a second openings of the insulating structure. The insulating structure covers portions of upper surfaces of the first and the second conductive devices. The plating layer covers remaining portions of the upper surfaces of the first and the second conductive devices. Lower surfaces of the first and the second conductive devices are located in the second opening.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: July 18, 2023
    Assignee: Jentech Precision Industrial Co., LTD.
    Inventors: Jian-Tsai Chang, Chin-Jui Yu, Jheng-Dong Huang
  • Publication number: 20220254705
    Abstract: The present disclosure is related to a lead frame structure. The lead frame structure includes a bottom board and a blocking wall. The bottom board has a first conductive portion and a second conductive portion. The first conductive portion separates from the second conductive portion. The first and second conductive portions are configured to electrically connect to a light source. The blocking wall is located on the bottom board, and the blocking wall surrounds an opening. The first and the second conductive portions are exposed from the opening. The first and the second conductive portions each have an extending portion. The extending portion extends beyond an external surface of the blocking wall in a horizontal direction.
    Type: Application
    Filed: April 14, 2021
    Publication date: August 11, 2022
    Inventors: Jian-Tsai CHANG, Chin-Jui YU, Chun-Hsiung WANG, Wei-Chi LIN
  • Publication number: 20210367123
    Abstract: A light emitting diode module includes a first conductive device, a second conductive device, an insulating structure and a plating layer. The first conductive device includes a first metal layer and a first protecting layer covering the first metal layer. The second conductive device includes a second metal layer and a second protecting layer covering the second metal layer. The insulating structure covers around the first and the second conductive devices. The plating layer is disposed on the first and the second protecting layers in a first and a second openings of the insulating structure. The insulating structure covers portions of upper surfaces of the first and the second conductive devices. The plating layer covers remaining portions of the upper surfaces of the first and the second conductive devices. Lower surfaces of the first and the second conductive devices are located in the second opening.
    Type: Application
    Filed: March 15, 2021
    Publication date: November 25, 2021
    Inventors: Jian-Tsai CHANG, Chin-Jui YU, Jheng-Dong HUANG
  • Publication number: 20050250320
    Abstract: A method of manufacturing a semiconductor device contact including forming an insulating layer over a substrate and forming an agglutinating layer over the insulating layer. The agglutinating layer is then exposed to a plasma treatment. A barrier layer is formed over the plasma-treated agglutinating layer, and a conductive layer is formed over the barrier layer.
    Type: Application
    Filed: May 10, 2004
    Publication date: November 10, 2005
    Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Jian Tsai, Yu-Hua Chou, Tzo-Hung Luo, Chi-Chan Tseng, Wei Zhang, Jong-Chen Yang