Patents by Inventor Jian-Xin HUANG

Jian-Xin HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10735009
    Abstract: A sampling device includes a switch capacitor circuit. First ends of two switches are respectively connected to an input signal. Second end of the first switch is connected to an upper plate of a first capacitor. Second end of the second switch is connected to a lower plate of a second capacitor. A connection node connecting a lower plate of the first capacitor to an upper plate of the second capacitor is connected to a power source. The first ends of a third switch and a fourth switch are respectively connected to an input common-mode voltage. A second end of the third switch is connected to the upper plate of the first capacitor. A second end of the fourth switch is connected to the lower plate of the second capacitor. The connection node is connected to the power source. Thus, an output common-mode voltage of the sampling device is adjustable.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: August 4, 2020
    Assignee: CHINA ELECTRONIC TECHNOLOGY CORPORATION, 24TH RESEARCH INSTITUTE
    Inventors: Ting Li, Gang-Yi Hu, Ru-Zhang Li, Jian-An Wang, Yong Zhang, Zheng-Bo Huang, Guang-Bing Chen, Yu-Xin Wang, Dong-Bing Fu, Yan Wang, Jun Yuan
  • Publication number: 20190341924
    Abstract: A sampling device includes a switch capacitor circuit. First ends of two switches are respectively connected to an input signal. Second end of the first switch is connected to an upper plate of a first capacitor. Second end of the second switch is connected to a lower plate of a second capacitor. A connection node connecting a lower plate of the first capacitor to an upper plate of the second capacitor is connected to a power source. The first ends of a third switch and a fourth switch are respectively connected to an input common-mode voltage. A second end of the third switch is connected to the upper plate of the first capacitor. A second end of the fourth switch is connected to the lower plate of the second capacitor. The connection node is connected to the power source. Thus, an output common-mode voltage of the sampling device is adjustable.
    Type: Application
    Filed: June 1, 2016
    Publication date: November 7, 2019
    Inventors: TING LI, GANG-YI HU, RU-ZHANG LI, JIAN-AN WANG, YONG ZHANG, ZHENG-BO HUANG, GUANG-BING CHEN, YU-XIN WANG, DONG-BING FU, YAN WANG, JUN YUAN
  • Publication number: 20190140340
    Abstract: A wireless adapter front end system and method for an information handling system including a wireless adapter for communicating on a plurality antenna systems for connection to a plurality of wireless links and an antenna configurable to have a plurality of antenna radiation patterns via an antenna pattern steering control interface, wherein the antenna is operating in a first antenna radiation pattern.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 9, 2019
    Applicant: Dell Products, LP
    Inventors: Suresh K. Ramasamy, Youngsoo Cho, Adolfo S. Montero, Ching Wei Chang, Ricardo R. Velasco, Geroncio O. Tan, Lars Fredrik Proejts, Jian Xin Guo, Stephen Shiao, Wei-Chia Huang
  • Publication number: 20170364368
    Abstract: A setting method of accessing system parameters and a server are provided. The server includes a baseboard management controller. The setting method includes the following steps. First, a remote device is used to log in a webpage of the server according to a network address. Then, a CMOS setting parameter of the server is read out from a storage space of the baseboard management controller and then is loaded in the webpage.
    Type: Application
    Filed: July 26, 2016
    Publication date: December 21, 2017
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Jian-Xin HUANG
  • Patent number: 9778988
    Abstract: A power failure monitoring system and a method are disclosed herein, where the power failure monitoring system includes a motherboard, a board, a complex programmable logic device (CPLD) and a baseboard management controller (BMC) module. The motherboard includes a central processing unit (CPU) power and a non-CPU power. The board includes a board power. The BMC module includes a register that is electrically coupled to the CPLD. The CPLD is configured to execute a shutdown process when power failure occurs, identify a power failure type, and determine whether to execute a restart process according to the power failure type. If the restart process is executed and a count of the restart process reaches a predetermined count, the CPLD records lock information in the register. The BMC module is configured to record the count of the restart process, and execute a lock process according to the lock information.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: October 3, 2017
    Assignees: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATION
    Inventors: Jian-Xin Huang, Ying-Xian Han
  • Patent number: 9690347
    Abstract: A HDD backboard includes a power detecting circuit and a first working circuit. The power detecting circuit is configured to determine whether a plurality of voltage rails of the HDD backboard are normal, so as to output a power detecting signal. The first working circuit is coupled with the power detecting circuit and configured to receive the power detecting signal and output an HDD backboard determining signal. The motherboard includes a second working circuit and a CPLD. The CPLD is configured to receive the HDD backboard determining signal The CPLD is configured to determine whether the HDD backboard is absent when the electronic device operates in a standby mode and determine whether the voltage rails are failed when the electronic device operates in a working mode.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: June 27, 2017
    Assignees: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATION
    Inventors: Ying-Xian Han, Jian-Xin Huang
  • Publication number: 20170060714
    Abstract: A HDD backboard includes a power detecting circuit and a first working circuit. The power detecting circuit is configured to determine whether a plurality of voltage rails of the HDD backboard are normal, so as to output a power detecting signal. The first working circuit is coupled with the power detecting circuit and configured to receive the power detecting signal and output an HDD backboard determining signal. The motherboard includes a second working circuit and a CPLD. The CPLD is configured to receive the HDD backboard determining signal The CPLD is configured to determine whether the HDD backboard is absent when the electronic device operates in a standby mode and determine whether the voltage rails are failed when the electronic device operates in a working mode.
    Type: Application
    Filed: October 22, 2015
    Publication date: March 2, 2017
    Inventors: Ying-Xian HAN, Jian-Xin HUANG
  • Publication number: 20170010938
    Abstract: A power failure monitoring system and a method are disclosed herein, where the power failure monitoring system includes a motherboard, a hoard, a complex programmable logic device (CPLD) and a baseboard management controller (BMC) module. The motherboard includes a central processing unit (CPU) power and a non-CPU power. The board includes a board power. The BMC module includes a register that is electrically coupled to the CPLD. The CPLD is configured to execute a shutdown process when power failure occurs, identify a power failure type, and determine whether to execute a restart process according to the power failure type. If the restart process is executed and a count of the restart process reaches a predetermined count, the CPLD records lock information in the register. The BMC module is configured to record the count of the restart process, and execute a lock process according to the lock information.
    Type: Application
    Filed: November 3, 2015
    Publication date: January 12, 2017
    Inventors: Jian-Xin HUANG, Ying-Xian HAN