Abstract: A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.

Abstract: An inductor device includes first trace, second trace, third trace, fourth trace, first capacitor, and second capacitor. One terminal of each of the at least two sub-traces of first trace are coupled to each other at first node. One terminal of each of the at least two sub-traces of second trace are coupled to each other at second node. One terminal of third trace is coupled to second trace, and another terminal of third trace is coupled to first input/output terminal. One terminal of fourth trace is coupled to first trace, and another terminal of fourth trace is coupled to second input/output terminal. First capacitor is coupled to first node and second node. Second capacitor is coupled between first node and first input/output terminal, or coupled between first node and second input/output terminal, or coupled between first input/output terminal and second input/output terminal.

Abstract: A radio frequency apparatus includes a power amplifier circuit, a signal coupling circuit, an extraction circuit, and a harmonic filter circuit. The power amplifier circuit is configured to amplify a differential signal to output a to-be-filtered signal. The signal coupling circuit includes a primary side inductor and a secondary side inductor. The signal coupling circuit is configured to convert the to-be-filtered signal received by the primary side inductor into a single-ended signal outputted from the secondary side inductor. The extraction circuit has a center tap. The extraction circuit is configured to inductively couple to the primary side inductor and output a common mode signal from the center tap. The harmonic filter circuit is configured to perform a harmonic filtering on the single-ended signal according to the common mode signal, such that the secondary side inductor of the signal coupling circuit outputs a filtered signal.

Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a first node. The second trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a second node. The capacitor is coupled to the firs node and the second node.

Abstract: A transformer device includes a first coil, a second coil, and a third coil. The first coil includes a first ring structure, a second ring structure, a first connecting portion, and a first terminal, in which the first terminal is arranged on the first connecting portion and is located at a central location between the first ring structure and the second ring structure, the first terminal is connected to the first ring structure through the first connecting portion in a first direction, and connected to the second ring structure through the first connecting portion in a second direction, and the first direction is the opposite of the second direction. The second coil is configured to couple the first ring structure. The third coil is configured to couple the second ring structure, in which the second coil and the third coil have the same structure.

Abstract: A wireless transmission circuit includes a first induction circuit, a second induction circuit, a detection circuit, a first signal adjustment circuit, and a third induction circuit. The first induction circuit is configured to receive a first signal outputted from a power amplifier. The second induction circuit is configured to output the received first signal as a second signal. The detection circuit is configured to detect a common mode signal associated with the first signal. The first signal adjustment circuit is configured to adjust a phase or an amplitude of the common mode signal to generate a third signal. The third induction circuit is configured to receive the third signal and be coupled to the second induction circuit to reduce a second harmonic in the second signal.

Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a first node. The second trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a second node. The capacitor is coupled to the firs node and the second node.

Abstract: An inductor device includes first trace, second trace, third trace, fourth trace, first capacitor, and second capacitor. One terminal of each of the at least two sub-traces of first trace are coupled to each other at first node. One terminal of each of the at least two sub-traces of second trace are coupled to each other at second node. One terminal of third trace is coupled to second trace, and another terminal of third trace is coupled to first input/output terminal. One terminal of fourth trace is coupled to first trace, and another terminal of fourth trace is coupled to second input/output terminal. First capacitor is coupled to first node and second node. Second capacitor is coupled between firs node and first input/output terminal, or coupled between first node and second input/output terminal, or coupled between first input/output terminal and second input/output terminal.

Abstract: A wireless transmission circuit includes a first induction circuit, a second induction circuit, a detection circuit, a first signal adjustment circuit, and a third induction circuit. The first induction circuit is configured to receive a first signal outputted from a power amplifier. The second induction circuit is configured to output the received first signal as a second signal. The detection circuit is configured to detect a common mode signal associated with the first signal. The first signal adjustment circuit is configured to adjust a phase or an amplitude of the common mode signal to generate a third signal. The third induction circuit is configured to receive the third signal and be coupled to the second induction circuit to reduce a second harmonic in the second signal.

Abstract: A transceiver circuit including: a substrate; a signal coupler configured on the substrate and including a coiled first conductive layer pattern; and a notch filter configured on the substrate and including a coiled second conductive layer pattern; wherein each of the first conductive layer pattern and the second conductive layer pattern is arranged as a substantially symmetrical pattern with respect to a first virtual axis.

Abstract: A transceiver circuit including: a substrate; a signal coupler configured on the substrate and including a coiled first conductive layer pattern; and a notch filter configured on the substrate and including a coiled second conductive layer pattern; wherein each of the first conductive layer pattern and the second conductive layer pattern is arranged as a substantially symmetrical pattern with respect to a first virtual axis.

Abstract: A signal demodulation module is disclosed. The signal demodulation module includes an injection-locked oscillator, an envelope detector and a data slicer. The injection-locked oscillator has a central oscillating frequency equal to a frequency of a digital modulation signal received, and outputs a phase-locked oscillating signal which is in phase to the digital modulation signal. When input phase of the digital modulation signal changes, output phase of the injection-locked oscillator changes synchronously. The envelope detector is used for detecting an envelope line of the phase-locked oscillating signal and outputting an envelope signal accordingly. The data slicer is used for receiving the envelop signal and outputting a first digital signal according to a reference voltage and the envelop signal.

Abstract: A signal demodulation module is disclosed. The signal demodulation module includes an injection-locked oscillator, an envelope detector and a data slicer. The injection-locked oscillator has a central oscillating frequency equal to a frequency of a digital modulation signal received, and outputs a phase-locked oscillating signal which is in phase to the digital modulation signal. When input phase of the digital modulation signal changes, output phase of the injection-locked oscillator changes synchronously. The envelope detector is used for detecting an envelope line of the phase-locked oscillating signal and outputting an envelope signal accordingly. The data slicer is used for receiving the envelop signal and outputting a first digital signal according to a reference voltage and the envelop signal.