Patents by Inventor JIAN-YU SHIH

JIAN-YU SHIH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071776
    Abstract: A chip packaging structure and a method for fabricating the same are provided. The chip package structure includes a conductive substrate, a dam and a metal shielding layer. The conductive substrate includes a substrate, vias and electrodes. The substrate has first and second board surfaces opposite to each other. The vias penetrate through the first board surface and the second board surface, and a part of the vias is disposed in a first die-bonding region on which a chip is to be arranged. The electrodes extend from the first board surface to the second board surface through the vias. The dam is formed on the first board surface to surround the first die-bonding region, and the dam has a height higher than that of the chip. The metal shielding layer covers the dam and a part of the first board surface that do not overlap with the electrodes.
    Type: Application
    Filed: December 2, 2022
    Publication date: February 29, 2024
    Inventors: DEI-CHENG LIU, CHIA-SHUAI CHANG, MING-YEN PAN, JIAN-YU SHIH, JHIH-WEI LAI, SHIH-HAN WU
  • Publication number: 20240071849
    Abstract: A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Jian-You Chen, Kuan-Yu Huang, Li-Chung Kuo, Chen-Hsuan Tsai, Kung-Chen Yeh, Hsien-Ju Tsou, Ying-Ching Shih, Szu-Wei Lu
  • Publication number: 20240032204
    Abstract: A method for manufacturing a conductive circuit board includes the steps of: (a) preparing a substrate having opposite upper and lower surfaces, and at least one through hole extending through the upper and lower surfaces and defined by an inner surface; (b) forming a metal base layer on at least one of the upper and lower surfaces and on the inner surface; (c) etching the metal base layer by a laser beam so that the at least one of the upper and lower surfaces and the inner surface are formed with a patterned metal base layer; and (d) forming a metal circuit layer on the at least one of the upper and lower surfaces and on the inner surface to increase a thickness of the patterned metal base layer. A conductive circuit board manufactured therefrom is also enclosed.
    Type: Application
    Filed: September 23, 2022
    Publication date: January 25, 2024
    Inventors: Yueh-Kai TANG, Chia-Shuai CHANG, Ming-Yen PAN, Jian-Yu SHIH, Jhih-Wei LAI, Shih-Han WU
  • Patent number: 8766734
    Abstract: The present invention provides a TSV-based oscillator WLP structure and a method for fabricating the same. The method of the present invention comprises steps: providing a silicon base having an oscillator unit disposed thereon; forming on the silicon base at least one package ring surrounding the oscillator unit; and disposing a silicon cap on the package ring to envelop the oscillator unit. The present invention adopts a cap and a base, which are made of the same material, to effectively overcome the problem of thermal stress occurring in a conventional sandwich package structure. Further, the present invention elaborately designs the wiring on the lower surface of the base to reduce the package size and decrease consumption of noble metals.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: July 1, 2014
    Assignee: TXC Corporation
    Inventors: Chi-Chung Chang, Chih-Hung Chiu, Yen-Chi Chen, Kuan-Neng Chen, Jian-Yu Shih
  • Publication number: 20130285754
    Abstract: The present invention provides a TSV-based oscillator WLP structure and a method for fabricating the same. The method of the present invention comprises steps: providing a silicon base having an oscillator unit disposed thereon; forming on the silicon base at least one package ring surrounding the oscillator unit; and disposing a silicon cap on the package ring to envelop the oscillator unit. The present invention adopts a cap and a base, which are made of the same material, to effectively overcome the problem of thermal stress occurring in a conventional sandwich package structure. Further, the present invention elaborately designs the wiring on the lower surface of the base to reduce the package size and decrease consumption of noble metals.
    Type: Application
    Filed: June 22, 2012
    Publication date: October 31, 2013
    Applicant: TXC CORPORATION
    Inventors: CHI-CHUNG CHANG, CHIH-HUNG CHIU, YEN-CHI CHEN, KUAN-NENG CHEN, JIAN-YU SHIH