Abstract: Semiconductor devices and methods for their assembly are described in which IC packages may be combined in novel configurations. A multi-package semiconductor device system and associated methods for its construction include a plurality of packaged semiconductor devices, each provided with at least one lateral electrical contact. The plurality of packaged semiconductor devices so provided are fixed in a coplanar configuration and have the adjacent lateral contacts coupled for operation in concert.

Abstract: A high density, high speed semiconductor module including a plurality of active semiconductor chip pairs bonded face-to-face. A functional system within the footprint of a single-chip package is provided by vertically stacking flip-chip pairs and interconnecting the chip pairs on a substrate or package. Assembly of the device including various combinations of more than one chip pair, in combination with individual chips, advantageously utilizes known manufacturing technology and equipment.

Abstract: The present invention provides a system and method for preparing semiconductor integrated circuits (“ICs”), particularly ball grid arrays (“BGAs”), quad flat packs (“QFPs”) and dual in line packages (“DIPs”) for failure analysis (“FA”) using a variety of techniques, including emission microscopy (“EM”) and externally induced voltage alteration (“XIVA”). This system and method requires precision thinning and polishing of the semiconductor IC device to expose the backside of the die and mounting of the semiconductor device on a secondary package assembly.