Abstract: A method for sample alignment is applied to a first participant system, where a first trusted execution environment is deployed at the first participant system. The method includes, in the first trusted execution environment, obtaining at least one first sample identifier of the first participant system; through the first trusted execution environment, obtaining at least one second sample identifier of the second participant system from the second trusted execution environment, where the second trusted execution environment is deployed at the second participant system; in the first trusted execution environment, determining the first initial intersection of the at least one first sample identifier and the at least one second sample identifier and performing the shuffle processing on all first target sample identifiers in the first initial intersection to obtain the first target intersection; and based on the first target intersection, determining the first sample alignment result.

Abstract: A support mechanism includes a base including a guide groove, and a heat-blocking member provided at the base and partially embedded in the guide groove. The heat-blocking member is configured to support a diaphragm and drive the diaphragm to move. A cross-sectional area of the guide groove gradually decreases along a depth direction of the guide groove.

Abstract: A processor and an operating method thereof for renaming a destination logical register of a move instruction are provided. The processor comprises a plurality of physical registers and a renaming circuit. The renaming circuit is coupled to the plurality of physical registers and is configured to receive an instruction sequence and check the instruction sequence. When a current instruction of the instruction sequence comprises the move instruction, the renaming circuit assigns a first physical register, which is assigned to a source logical register of the current instruction previously, to the destination logical register of the current instruction. The first physical register is one of the plurality of physical registers.

Abstract: A cache memory device is provided in the disclosure. The cache memory device includes a first AGC, a compression circuit, a second AGC, a virtual tag array, and a comparator circuit. The first AGC generates a virtual address based on a load instruction. The compression circuit obtains the higher part of the virtual address and generates a target hash value based on the higher part of the virtual address. The second AGC generates the lower part of the virtual address based on the load instruction. The virtual tag array obtains the lower part and selects a set of memory units. The comparator circuit compares the target hash value to a hash value stored in each memory unit of the set of memory units. When the comparator circuit generates the virtual tag miss signal, the comparator circuit transmits the virtual tag miss signal to the reservation station.

Abstract: A cache memory device is provided in the disclosure. The cache memory device includes a first AGC, a compression circuit, a second AGC, a virtual tag array, and a comparator circuit. The first AGC generates a virtual address based on a load instruction. The compression circuit obtains the higher part of the virtual address and generates a target hash value based on the higher part of the virtual address. The second AGC generates the lower part of the virtual address based on the load instruction. The virtual tag array obtains the lower part and selects a set of memory units. The comparator circuit compares the target hash value to a hash value stored in each memory unit of the set of memory units. When the comparator circuit generates the virtual tag miss signal, the comparator circuit transmits the virtual tag miss signal to the reservation station.

Abstract: Disclosed herein are methods and compositions for generating a single-stranded break in a target sequence, which facilitates targeted integration of one or more exogenous sequences.

Abstract: An instruction execution method suitable for being executed by a processor is provided. The first processor comprises a register alias table (RAT) and a reservation station. The instruction execution method includes: a register alias table receives a first micro-instruction and a second micro-instruction and issues the first micro-instruction and the second micro-instruction to the reservation station; and the reservation station assigns one of a plurality of execution units to execute the first micro-instruction, according to the first specific message of the first micro-instruction; and the reservation station assigns one of the execution units to execute the second micro-instruction, according to the second specific message of the second micro-instruction.

Abstract: A processor and an operating method thereof are provided. The processor comprises a plurality of physical registers and a renaming circuit. The renaming circuit is coupled to the plurality of physical registers and is configured to receive an instruction sequence and check the instruction sequence. When a current instruction of the instruction sequence comprises a move instruction, the renaming circuit assigns a first physical register, which is assigned to a source logical register of the current instruction previously, to a destination logical register of the current instruction. The first physical register is one of the plurality of physical registers.

Abstract: Disclosed herein are methods and compositions for generating a single-stranded break in a target sequence, which facilitates targeted integration of one or more exogenous sequences.

Abstract: The present invention provides a degradable microbead comprising a polymer molecule crosslinked by a crosslinking agent, wherein the polymer molecule and/or the crosslinking agent comprises a sensitive chemical bond that is cleavable through a chemical and/or light treatment, thereby resulting in the degradation of the degradable microbead. The present invention also provides a method of separating a target protein from a sample. By using the degradation of the degradable microbead to replace an elution step in protein purification, it is possible to select a combination of target protein and affinity ligand with a stronger affinity, thereby improving the protein purification efficiency. The method is especially suitable for the high-throughput preparation of multiple protein samples, for example providing a protein sample for electron microscope observation or mass spectrometry measurement.

Abstract: The present invention relates to a method of reducing the production of glutamate from glutamine by glutaminase C in a cell or tissue. The method involves inhibiting glutaminase C activity in the cell or tissue under conditions effective to reduce production of glutamate from glutamine. Compounds for carrying out this method are also disclosed.

Abstract: The present disclosure provides a system for regulating expression of a target polynucleotide in a cell. The system may comprise a chimeric polypeptide comprising a gene modulating polypeptide fused in-frame with a heterologous nuclear localization domain. The heterologous nuclear localization domain may be operable to translocate the chimeric polypeptide to a cell nucleus upon activation by an active cellular signaling pathway. The cellular signaling pathway may be inducible in response to an extracellular signal. In response to the extracellular signal, the chimeric polypeptide may localize to the cell nucleus and the gene modulating polypeptide may regulate expression of a target polynucleotide in the cell nucleus.

Abstract: An instruction execution method suitable for being executed by a processor is provided. The first processor comprises a register alias table (RAT) and a reservation station. The instruction execution method includes: a register alias table receives a first micro-instruction and a second micro-instruction and issues the first micro-instruction and the second micro-instruction to the reservation station; and the reservation station assigns one of a plurality of execution units to execute the first micro-instruction, according to the first specific message of the first micro-instruction; and the reservation station assigns one of the execution units to execute the second micro-instruction, according to the second specific message of the second micro-instruction.

Abstract: A method of preparing polyurethane hot melt adhesive with high temperature resistance generally includes the following steps: (1) adding isocyanate with a silane modifier in a reactor in an inert atmosphere, heating and stirring, then adding chemical dehydrant into the reactor and mixing evenly; (2) adding dehydrated diluent and tackifier resin to the reactor while maintaining the inert atmosphere and heating, adding dehydrated polyester polyol and polyether polyol, stirring, and allowing to react at constant temperature for a predetermined time period; (3) adding dehydrated polyether amine, stirring, and heating; and (4) adding a catalyst, vacuumizing, discharging materials and packaging the materials in an airtight container.

Abstract: A method of preparing polyurethane hot melt adhesive with high temperature resistance generally includes the following steps: (1) adding isocyanate with a silane modifier in a reactor in an inert atmosphere, heating and stirring, then adding chemical dehydrant into the reactor and mixing evenly; (2) adding dehydrated diluent and tackifier resin to the reactor while maintaining the inert atmosphere and heating, adding dehydrated polyester polyol and polyether polyol, stirring, and allowing to react at constant temperature for a predetermined time period; (3) adding dehydrated polyether amine, stirring, and heating; and (4) adding a catalyst, vacuumizing, discharging materials and packaging the materials in an airtight container.

Abstract: Disclosed herein are methods and compositions for generating a single-stranded break in a target sequence, which facilitates targeted integration of one or more exogenous sequences.

Abstract: Disclosed herein are methods and compositions for generating a single-stranded break in a target sequence, which facilitates targeted integration of one or more exogenous sequences.

Abstract: The present disclosure provides systems, methods, and compositions for conditionally regulating expression of a target gene. Aspects of the present disclosure utilize intracellular signal transduction pathways to regulate the expression of a gene (e.g., transgene, exogenous gene, endogenous gene).