Patents by Inventor Jianbo Chen

Jianbo Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10987271
    Abstract: An upper limb exoskeleton rehabilitation device having man-machine motion matching and side-to-side interchanging, includes a chassis bracket assembly, a shoulder girdle abduction assembly, a side-to-side interchanging assembly and a mechanical arm coupling member. The chassis bracket assembly includes a frame and a lifting unit mounted on the frame. The shoulder girdle abduction assembly is mounted on the lifting unit to be driven by the lifting unit to move up and down. The side-to-side interchanging assembly is rotatably connected to the shoulder girdle abduction assembly and the mechanical arm coupling member, and the mechanical arm coupling member is configured to mount the mechanical arm and drive the mechanical arm to rotate with the respective rotating joints.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: April 27, 2021
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Caihua Xiong, Xuan Wu, Chang He, Jianbo Tao, Chenbo Wang, Wenbin Chen
  • Patent number: 10982242
    Abstract: The present invention relates to an optimized fermentation process of coenzyme Q10, particularly to a fermentation process of coenzyme Q10 via flow feeding based on cooperative control of changes of online oxygen consumption rate and conductivity. During the fermentation process of coenzyme Q10 production strains, the oxygen consumption rate is controlled between 30-150 mmol/L·h and the conductivity is maintained between 3.0-30.0 ms/cm via flow feeding, so as to facilitate strain growth and the start of coenzyme Q10 synthesis and accumulation. The present invention can substantially increase output of coenzyme Q10 and greatly reduce the production cost with simple process control and strong operability, thus being applicable to large-scale industrial production.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: April 20, 2021
    Assignees: SHANGYU NHU BIOLOGICAL CHEMICAL CO., LTD., ZHEJIANG UNIVERSITY, ZHEJIANG NHU COMPANY LTD.
    Inventors: Hongwei Yu, Yong Lv, Yong Li, Jianbo Chen, Shaofeng Chen, Weifeng Li, Hongmei Zhang, Yongqiang Zhu
  • Publication number: 20210111720
    Abstract: An apparatus for generating an output voltage signal based on an input voltage signal. The apparatus includes a first field effect transistor (FET) including a first gate configured to receive a first gate voltage based on the input voltage signal; a second (FET) including a second gate configured to receive a second gate voltage based on the input voltage signal, wherein the first and second FETs are coupled in series between a first voltage rail and a second voltage rail, and wherein the output voltage signal is produced at an output node between the first and second FETs; and a gate overdrive circuit configured to temporarily reduce the first gate voltage during a portion of a transition of the output voltage signal from a logic low level to a logic high level.
    Type: Application
    Filed: August 31, 2020
    Publication date: April 15, 2021
    Inventors: Sumit RAO, Wilson Jianbo CHEN, Chiew-Guan TAN
  • Patent number: 10892760
    Abstract: An apparatus for generating an output voltage signal based on an input voltage signal. The apparatus includes a first field effect transistor (FET) including a first gate configured to receive a first gate voltage based on the input voltage signal; a second (FET) including a second gate configured to receive a second gate voltage based on the input voltage signal, wherein the first and second FETs are coupled in series between a first voltage rail and a second voltage rail, and wherein the output voltage signal is produced at an output node between the first and second FETs; and a gate overdrive circuit configured to temporarily reduce the first gate voltage during a portion of a transition of the output voltage signal from a logic low level to a logic high level.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: January 12, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Sumit Rao, Wilson Jianbo Chen, Chiew-Guan Tan
  • Patent number: 10700683
    Abstract: Aspects generally relate to receivers, and in particular to a receiver that converts a high-voltage input signal into a low-voltage signal. The high voltage input signal is split into a upper portion and a lower portion. The upper portion is coupled to a high input receiver that is powered by dynamic supply shifters that can vary supply voltage during operation to optimize switching.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: June 30, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Wilson Jianbo Chen, Chiew-Guan Tan, Sumit Rao
  • Publication number: 20180287835
    Abstract: Systems, methods, and apparatus for managing digital communication interfaces coupled to data communication links are disclosed. In one example, the digital communication interfaces provide methods, protocols and techniques that may be used to provide a common slew rate for signals transmitted on a communication link that may be operated at multiple different voltage ranges. A method may include determining a first voltage range defined for transmitting signals over the communication link when the over the communication link is operated in a first mode of operation, configuring a line driver to operate within the first voltage range with a common slew rate that applies to each of a plurality of modes of operation, and transmitting first data over the communication link in one or more signals that switch within the first voltage range with the common slew rate. Each mode of operation may define a different voltage range for transmitting signals.
    Type: Application
    Filed: March 13, 2018
    Publication date: October 4, 2018
    Inventors: Lalan Jee MISHRA, Helena Deirdre O'SHEA, Chiew-Guan TAN, ZhenQi CHEN, Wilson Jianbo CHEN, Richard Dominic WIETFELDT
  • Publication number: 20180245113
    Abstract: The present invention relates to an optimized fermentation process of coenzyme Q10, particularly to a fermentation process of coenzyme Q10 via flow feeding based on cooperative control of changes of online oxygen consumption rate and conductivity. During the fermentation process of coenzyme Q10 production strains, the oxygen consumption rate is controlled between 30-150 mmol/L·h and the conductivity is maintained between 3.0-30.0 ms/cm via flow feeding, so as to facilitate strain growth and the start of coenzyme Q10 synthesis and accumulation. The present invention can substantially increase output of coenzyme Q10 and greatly reduce the production cost with simple process control and strong operability, thus being applicable to large-scale industrial production.
    Type: Application
    Filed: October 21, 2016
    Publication date: August 30, 2018
    Inventors: HONGWEI YU, YONG LV, YONG LI, JIANBO CHEN, ZHAOFENG CHEN, WEIFENG LI, HONGMEI ZHANG, YONGQIANG ZHU
  • Patent number: 9731391
    Abstract: Camera phone accessories for using the camera phone to collect scientific data.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: August 15, 2017
    Assignee: Nano3D Biosciences Inc.
    Inventors: Glauco R. Souza, Jianbo Chen
  • Patent number: 9484911
    Abstract: A back-power prevention circuit is provided that protects a buffer transistor from back-power during a back-power condition by charging a signal lead coupled to a gate of the buffer transistor to a pad voltage and by charging a body of the buffer transistor to the pad voltage.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: November 1, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Wilson Jianbo Chen, Chiew-Guan Tan, Reza Jalilizeinali
  • Publication number: 20160248418
    Abstract: A back-power prevention circuit is provided that protects a buffer transistor from back-power during a back-power condition by charging a signal lead coupled to a gate of the buffer transistor to a pad voltage and by charging a body of the buffer transistor to the pad voltage.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 25, 2016
    Inventors: Wilson Jianbo Chen, Chiew-Guan Tan, Reza Jalilizeinali
  • Patent number: 9202535
    Abstract: In a particular embodiment, a method includes modifying an output impedance associated with the input receiver. In response to modifying the output impedance, the method restricts an output voltage at an output node of the input receiver. Particular embodiments of an input receiver circuit are also disclosed.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: December 1, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Chang Ki Kwon, Wilson Jianbo Chen, Reza Jalilizeinali
  • Patent number: 9184735
    Abstract: An input receiver for stepping down a high-voltage domain input signal into a low-voltage-domain stepped-down signal includes a waveform chopper. The waveform chopper chops the high-voltage domain input signal into a first chopped signal and a second chopped signal. A high-voltage-domain receiver combines the first chopped signal and the second chopped signal into a high-voltage-domain combined signal. A step-down device converts the high-voltage-domain combined signal into a stepped-down low-voltage-domain signal.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: November 10, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Wilson Jianbo Chen, Chiew-Guan Tan, Reza Jalilizeinali
  • Publication number: 20150303906
    Abstract: An input receiver for stepping down a high-voltage domain input signal into a low-voltage-domain stepped-down signal includes a waveform chopper. The waveform chopper chops the high-voltage domain input signal into a first chopped signal and a second chopped signal. A high-voltage-domain receiver combines the first chopped signal and the second chopped signal into a high-voltage-domain combined signal. A step-down device converts the high-voltage-domain combined signal into a stepped-down low-voltage-domain signal.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 22, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Wilson Jianbo Chen, Chiew-Guan Tan, Reza Jalilizeinali
  • Publication number: 20150091233
    Abstract: Camera phone accessories for using the camera phone to collect scientific data.
    Type: Application
    Filed: April 22, 2013
    Publication date: April 2, 2015
    Inventors: Glauco R. Souza, Jianbo Chen
  • Publication number: 20140266382
    Abstract: In a particular embodiment, a method includes modifying an output impedance associated with the input receiver. In response to modifying the output impedance, the method restricts an output voltage at an output node of the input receiver. Particular embodiments of an input receiver circuit are also disclosed.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Chang Ki Kwon, Wilson Jianbo Chen, Reza Jalilizeinali
  • Patent number: 8754677
    Abstract: An input/output (I/O) driver is disclosed that employs a compensation circuit to limit the voltages across devices of the driver from exceeding a defined threshold to allow lower voltage devices to implement the operation of the driver. In particular, the driver employs a pull-up circuit including first and second switching devices coupled between a first voltage rail and an output of the driver. The driver employs a pull-down circuit including third and fourth switching devices coupled between the output and a second voltage rail. The I/O driver employs a compensation circuit configured to apply a compensation voltage to the node between the first and second switching devices and to the node between the third and fourth switching devices at the appropriate times to maintain the respective voltages across the second and third switching devices at or below a defined threshold, such as a reliability limit, during the operation of the driver.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: June 17, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Wilson Jianbo Chen, Chiew-Guan Tan, Reza Jalilizeinali
  • Publication number: 20140091860
    Abstract: An input/output (I/O) driver is disclosed that employs a compensation circuit to limit the voltages across devices of the driver from exceeding a defined threshold to allow lower voltage devices to implement the operation of the driver. In particular, the driver employs a pull-up circuit including first and second switching devices coupled between a first voltage rail and an output of the driver. The driver employs a pull-down circuit including third and fourth switching devices coupled between the output and a second voltage rail. The I/O driver employs a compensation circuit configured to apply a compensation voltage to the node between the first and second switching devices and to the node between the third and fourth switching devices at the appropriate times to maintain the respective voltages across the second and third switching devices at or below a defined threshold, such as a reliability limit, during the operation of the driver.
    Type: Application
    Filed: November 21, 2012
    Publication date: April 3, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Wilson Jianbo Chen, Chiew-Guan Tan, Reza Jalilizeinali